mirror of
https://github.com/Steffo99/fermi-ser-2016-aialu.git
synced 2024-11-22 05:24:17 +00:00
parent
3aadc36542
commit
9b367ea2ea
1 changed files with 202 additions and 141 deletions
343
aiAlu.circ
343
aiAlu.circ
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@ -120,35 +120,11 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
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<wire from="(250,180)" to="(260,180)"/>
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<wire from="(250,180)" to="(260,180)"/>
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||||||
<wire from="(70,100)" to="(80,100)"/>
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<wire from="(70,100)" to="(80,100)"/>
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||||||
<wire from="(80,100)" to="(80,160)"/>
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<wire from="(80,100)" to="(80,160)"/>
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||||||
<comp lib="0" loc="(50,70)" name="Pin">
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<comp lib="1" loc="(250,100)" name="NOT Gate">
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<a name="width" val="4"/>
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||||||
<a name="tristate" val="false"/>
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<a name="label" val="Data"/>
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<a name="labelloc" val="north"/>
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</comp>
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<comp lib="0" loc="(50,30)" name="Pin">
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<a name="width" val="2"/>
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<a name="tristate" val="false"/>
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<a name="label" val="Select"/>
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<a name="labelloc" val="north"/>
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</comp>
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<comp lib="1" loc="(290,150)" name="AND Gate">
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<a name="size" val="30"/>
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<a name="inputs" val="3"/>
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</comp>
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<comp lib="1" loc="(400,130)" name="OR Gate">
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<a name="inputs" val="4"/>
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</comp>
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<comp lib="1" loc="(250,150)" name="NOT Gate">
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<a name="size" val="20"/>
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<a name="size" val="20"/>
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</comp>
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</comp>
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<comp lib="1" loc="(290,190)" name="AND Gate">
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<comp lib="1" loc="(250,190)" name="NOT Gate">
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<a name="size" val="30"/>
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<a name="size" val="20"/>
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<a name="inputs" val="3"/>
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</comp>
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<comp lib="1" loc="(290,70)" name="AND Gate">
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<a name="size" val="30"/>
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<a name="inputs" val="3"/>
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</comp>
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</comp>
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<comp lib="0" loc="(430,130)" name="Pin">
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<comp lib="0" loc="(430,130)" name="Pin">
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<a name="facing" val="west"/>
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<a name="facing" val="west"/>
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@ -156,9 +132,42 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
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<a name="label" val="Output"/>
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<a name="label" val="Output"/>
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<a name="labelloc" val="east"/>
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<a name="labelloc" val="east"/>
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</comp>
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</comp>
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<comp lib="1" loc="(250,100)" name="NOT Gate">
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<comp lib="1" loc="(290,190)" name="AND Gate">
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<a name="size" val="30"/>
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<a name="inputs" val="3"/>
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</comp>
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<comp lib="1" loc="(250,180)" name="NOT Gate">
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<a name="size" val="20"/>
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<a name="size" val="20"/>
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</comp>
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</comp>
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<comp lib="1" loc="(250,150)" name="NOT Gate">
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<a name="size" val="20"/>
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</comp>
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<comp lib="0" loc="(50,30)" name="Pin">
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<a name="width" val="2"/>
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<a name="tristate" val="false"/>
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<a name="label" val="Select"/>
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<a name="labelloc" val="north"/>
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</comp>
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<comp lib="0" loc="(170,30)" name="Splitter">
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<a name="facing" val="south"/>
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</comp>
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<comp lib="0" loc="(50,70)" name="Pin">
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<a name="width" val="4"/>
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<a name="tristate" val="false"/>
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<a name="label" val="Data"/>
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<a name="labelloc" val="north"/>
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</comp>
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<comp lib="1" loc="(290,110)" name="AND Gate">
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<a name="size" val="30"/>
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<a name="inputs" val="3"/>
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</comp>
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<comp lib="1" loc="(400,130)" name="OR Gate">
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<a name="inputs" val="4"/>
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</comp>
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<comp lib="1" loc="(290,70)" name="AND Gate">
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<a name="size" val="30"/>
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<a name="inputs" val="3"/>
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</comp>
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<comp lib="0" loc="(50,70)" name="Splitter">
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<comp lib="0" loc="(50,70)" name="Splitter">
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<a name="fanout" val="4"/>
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<a name="fanout" val="4"/>
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<a name="incoming" val="4"/>
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<a name="incoming" val="4"/>
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@ -168,19 +177,10 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
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<a name="bit2" val="1"/>
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<a name="bit2" val="1"/>
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<a name="bit3" val="0"/>
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<a name="bit3" val="0"/>
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</comp>
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</comp>
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<comp lib="1" loc="(250,180)" name="NOT Gate">
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<comp lib="1" loc="(290,150)" name="AND Gate">
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<a name="size" val="20"/>
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</comp>
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<comp lib="0" loc="(170,30)" name="Splitter">
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<a name="facing" val="south"/>
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</comp>
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<comp lib="1" loc="(290,110)" name="AND Gate">
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<a name="size" val="30"/>
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<a name="size" val="30"/>
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<a name="inputs" val="3"/>
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<a name="inputs" val="3"/>
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</comp>
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</comp>
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<comp lib="1" loc="(250,190)" name="NOT Gate">
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<a name="size" val="20"/>
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</comp>
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</circuit>
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</circuit>
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<circuit name="fullAdder">
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<circuit name="fullAdder">
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<a name="circuit" val="fullAdder"/>
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<a name="circuit" val="fullAdder"/>
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@ -237,69 +237,75 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
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<a name="tristate" val="false"/>
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<a name="tristate" val="false"/>
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<a name="label" val="B"/>
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<a name="label" val="B"/>
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</comp>
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</comp>
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<comp lib="0" loc="(430,80)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="label" val="Output"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="1" loc="(190,270)" name="AND Gate">
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<a name="inputs" val="2"/>
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</comp>
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<comp lib="0" loc="(70,140)" name="Pin">
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<a name="tristate" val="false"/>
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<a name="label" val="Carry In"/>
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</comp>
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<comp lib="0" loc="(70,60)" name="Pin">
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<a name="tristate" val="false"/>
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<a name="label" val="A"/>
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</comp>
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<comp lib="1" loc="(190,330)" name="AND Gate">
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<a name="inputs" val="2"/>
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</comp>
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<comp lib="1" loc="(300,80)" name="XOR Gate">
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<comp lib="1" loc="(300,80)" name="XOR Gate">
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<a name="inputs" val="2"/>
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<a name="inputs" val="2"/>
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</comp>
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</comp>
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<comp lib="1" loc="(320,270)" name="OR Gate">
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<comp lib="1" loc="(320,270)" name="OR Gate">
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<a name="inputs" val="3"/>
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<a name="inputs" val="3"/>
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</comp>
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</comp>
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<comp lib="1" loc="(190,80)" name="XOR Gate">
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<a name="inputs" val="2"/>
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</comp>
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<comp lib="0" loc="(430,270)" name="Pin">
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<comp lib="0" loc="(430,270)" name="Pin">
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<a name="facing" val="west"/>
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="output" val="true"/>
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<a name="label" val="Carry Out"/>
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<a name="label" val="Carry Out"/>
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<a name="labelloc" val="east"/>
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<a name="labelloc" val="east"/>
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</comp>
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</comp>
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<comp lib="0" loc="(70,60)" name="Pin">
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<a name="tristate" val="false"/>
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<a name="label" val="A"/>
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</comp>
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<comp lib="1" loc="(190,80)" name="XOR Gate">
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<a name="inputs" val="2"/>
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</comp>
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<comp lib="0" loc="(430,80)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="label" val="Output"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="1" loc="(190,210)" name="AND Gate">
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<comp lib="1" loc="(190,210)" name="AND Gate">
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<a name="inputs" val="2"/>
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<a name="inputs" val="2"/>
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</comp>
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</comp>
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<comp lib="1" loc="(190,270)" name="AND Gate">
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<a name="inputs" val="2"/>
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</comp>
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<comp lib="1" loc="(190,330)" name="AND Gate">
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<a name="inputs" val="2"/>
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</comp>
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<comp lib="0" loc="(70,140)" name="Pin">
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<a name="tristate" val="false"/>
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<a name="label" val="Carry In"/>
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</comp>
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</circuit>
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</circuit>
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<circuit name="aiSum">
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<circuit name="aiSum">
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<a name="circuit" val="aiSum"/>
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<a name="circuit" val="aiSum"/>
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<a name="clabel" val=""/>
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<a name="clabel" val=""/>
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<a name="clabelup" val="east"/>
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<a name="clabelup" val="east"/>
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<a name="clabelfont" val="SansSerif plain 12"/>
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<a name="clabelfont" val="SansSerif plain 12"/>
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<wire from="(450,220)" to="(450,290)"/>
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<appear>
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<path d="M66,50 Q70,60 74,50" fill="none" stroke="#808080" stroke-width="2"/>
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<rect fill="none" height="40" stroke="#000000" stroke-width="2" width="40" x="50" y="50"/>
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<polygon fill="#c9c9c9" points="67,61 67,67 61,67 61,73 67,73 67,79 73,79 73,73 79,73 79,67 73,67 73,61" stroke="none"/>
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<text font-family="SansSerif" font-size="12" text-anchor="middle" x="70" y="74">8</text>
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<circ-port height="8" pin="140,40" width="8" x="46" y="56"/>
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<circ-port height="8" pin="140,70" width="8" x="46" y="76"/>
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<circ-port height="8" pin="140,100" width="8" x="56" y="86"/>
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<circ-port height="10" pin="670,70" width="10" x="85" y="65"/>
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<circ-port height="10" pin="670,100" width="10" x="75" y="85"/>
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<circ-anchor facing="east" height="6" width="6" x="67" y="67"/>
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</appear>
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<wire from="(260,90)" to="(510,90)"/>
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<wire from="(260,90)" to="(510,90)"/>
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<wire from="(200,170)" to="(260,170)"/>
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<wire from="(200,80)" to="(510,80)"/>
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<wire from="(460,280)" to="(510,280)"/>
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<wire from="(200,180)" to="(250,180)"/>
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<wire from="(480,200)" to="(480,210)"/>
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<wire from="(480,200)" to="(480,210)"/>
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<wire from="(270,170)" to="(270,190)"/>
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<wire from="(590,120)" to="(630,120)"/>
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<wire from="(660,100)" to="(660,380)"/>
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<wire from="(260,90)" to="(260,170)"/>
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<wire from="(260,90)" to="(260,170)"/>
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<wire from="(270,170)" to="(510,170)"/>
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<wire from="(210,360)" to="(510,360)"/>
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<wire from="(140,70)" to="(180,70)"/>
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<wire from="(140,70)" to="(180,70)"/>
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<wire from="(620,150)" to="(620,360)"/>
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<wire from="(250,90)" to="(250,120)"/>
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<wire from="(250,90)" to="(250,120)"/>
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<wire from="(140,100)" to="(170,100)"/>
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<wire from="(200,120)" to="(230,120)"/>
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<wire from="(440,230)" to="(440,330)"/>
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<wire from="(440,230)" to="(440,330)"/>
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<wire from="(540,160)" to="(570,160)"/>
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<wire from="(490,200)" to="(510,200)"/>
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<wire from="(490,200)" to="(510,200)"/>
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<wire from="(230,240)" to="(510,240)"/>
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<wire from="(230,240)" to="(510,240)"/>
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<wire from="(470,210)" to="(470,250)"/>
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<wire from="(200,130)" to="(220,130)"/>
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<wire from="(500,220)" to="(510,220)"/>
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<wire from="(500,220)" to="(510,220)"/>
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<wire from="(250,130)" to="(250,180)"/>
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<wire from="(250,130)" to="(250,180)"/>
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<wire from="(500,140)" to="(510,140)"/>
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<wire from="(500,140)" to="(510,140)"/>
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@ -308,11 +314,10 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
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<wire from="(500,300)" to="(510,300)"/>
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<wire from="(500,300)" to="(510,300)"/>
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<wire from="(500,340)" to="(510,340)"/>
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<wire from="(500,340)" to="(510,340)"/>
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<wire from="(500,380)" to="(510,380)"/>
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<wire from="(500,380)" to="(510,380)"/>
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<wire from="(240,160)" to="(510,160)"/>
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<wire from="(540,360)" to="(620,360)"/>
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<wire from="(200,190)" to="(270,190)"/>
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<wire from="(200,190)" to="(270,190)"/>
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<wire from="(230,120)" to="(230,240)"/>
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<wire from="(140,40)" to="(270,40)"/>
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<wire from="(140,40)" to="(270,40)"/>
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<wire from="(440,330)" to="(510,330)"/>
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<wire from="(660,100)" to="(670,100)"/>
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<wire from="(540,100)" to="(550,100)"/>
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<wire from="(540,100)" to="(550,100)"/>
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<wire from="(540,140)" to="(550,140)"/>
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<wire from="(540,140)" to="(550,140)"/>
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<wire from="(540,180)" to="(550,180)"/>
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<wire from="(540,180)" to="(550,180)"/>
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@ -320,18 +325,9 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
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<wire from="(540,260)" to="(550,260)"/>
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<wire from="(540,260)" to="(550,260)"/>
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<wire from="(540,300)" to="(550,300)"/>
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<wire from="(540,300)" to="(550,300)"/>
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<wire from="(540,340)" to="(550,340)"/>
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<wire from="(540,340)" to="(550,340)"/>
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<wire from="(240,100)" to="(240,160)"/>
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<wire from="(250,120)" to="(510,120)"/>
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<wire from="(250,120)" to="(510,120)"/>
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<wire from="(550,140)" to="(550,150)"/>
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<wire from="(550,180)" to="(550,190)"/>
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<wire from="(550,100)" to="(550,110)"/>
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<wire from="(550,220)" to="(550,230)"/>
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<wire from="(550,260)" to="(550,270)"/>
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<wire from="(550,300)" to="(550,310)"/>
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<wire from="(550,340)" to="(550,350)"/>
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<wire from="(450,290)" to="(510,290)"/>
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<wire from="(450,290)" to="(510,290)"/>
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<wire from="(460,150)" to="(460,280)"/>
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<wire from="(580,110)" to="(630,110)"/>
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<wire from="(200,220)" to="(450,220)"/>
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<wire from="(500,110)" to="(550,110)"/>
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<wire from="(500,110)" to="(550,110)"/>
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<wire from="(500,150)" to="(550,150)"/>
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<wire from="(500,150)" to="(550,150)"/>
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<wire from="(500,190)" to="(550,190)"/>
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<wire from="(500,190)" to="(550,190)"/>
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@ -340,10 +336,10 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
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<wire from="(500,310)" to="(550,310)"/>
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<wire from="(500,310)" to="(550,310)"/>
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<wire from="(500,350)" to="(550,350)"/>
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<wire from="(500,350)" to="(550,350)"/>
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<wire from="(200,90)" to="(250,90)"/>
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<wire from="(200,90)" to="(250,90)"/>
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||||||
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<wire from="(540,200)" to="(580,200)"/>
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<wire from="(210,150)" to="(210,360)"/>
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<wire from="(220,150)" to="(460,150)"/>
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<wire from="(220,150)" to="(460,150)"/>
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<wire from="(200,230)" to="(440,230)"/>
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<wire from="(560,90)" to="(560,120)"/>
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<wire from="(270,100)" to="(510,100)"/>
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<wire from="(220,130)" to="(220,150)"/>
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<wire from="(500,110)" to="(500,140)"/>
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<wire from="(500,110)" to="(500,140)"/>
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<wire from="(500,150)" to="(500,180)"/>
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<wire from="(500,150)" to="(500,180)"/>
|
||||||
<wire from="(500,190)" to="(500,220)"/>
|
<wire from="(500,190)" to="(500,220)"/>
|
||||||
|
|
@ -353,50 +349,115 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
|
||||||
<wire from="(500,350)" to="(500,380)"/>
|
<wire from="(500,350)" to="(500,380)"/>
|
||||||
<wire from="(200,140)" to="(430,140)"/>
|
<wire from="(200,140)" to="(430,140)"/>
|
||||||
<wire from="(200,100)" to="(240,100)"/>
|
<wire from="(200,100)" to="(240,100)"/>
|
||||||
<wire from="(200,110)" to="(490,110)"/>
|
|
||||||
<wire from="(490,110)" to="(490,200)"/>
|
|
||||||
<wire from="(470,250)" to="(510,250)"/>
|
<wire from="(470,250)" to="(510,250)"/>
|
||||||
<wire from="(480,210)" to="(510,210)"/>
|
<wire from="(540,80)" to="(630,80)"/>
|
||||||
<wire from="(200,200)" to="(480,200)"/>
|
|
||||||
<wire from="(200,210)" to="(470,210)"/>
|
|
||||||
<wire from="(430,140)" to="(430,320)"/>
|
<wire from="(430,140)" to="(430,320)"/>
|
||||||
<wire from="(170,160)" to="(180,160)"/>
|
<wire from="(570,100)" to="(570,160)"/>
|
||||||
<wire from="(430,320)" to="(510,320)"/>
|
|
||||||
<wire from="(270,40)" to="(270,100)"/>
|
<wire from="(270,40)" to="(270,100)"/>
|
||||||
<wire from="(170,100)" to="(170,160)"/>
|
<wire from="(170,100)" to="(170,160)"/>
|
||||||
<wire from="(250,130)" to="(510,130)"/>
|
<wire from="(250,130)" to="(510,130)"/>
|
||||||
<comp loc="(540,280)" name="fullAdder"/>
|
<wire from="(620,150)" to="(630,150)"/>
|
||||||
<comp loc="(540,240)" name="fullAdder"/>
|
<wire from="(450,220)" to="(450,290)"/>
|
||||||
<comp loc="(540,160)" name="fullAdder"/>
|
<wire from="(540,380)" to="(660,380)"/>
|
||||||
<comp lib="0" loc="(140,40)" name="Pin">
|
<wire from="(200,240)" to="(200,370)"/>
|
||||||
<a name="tristate" val="false"/>
|
<wire from="(540,240)" to="(590,240)"/>
|
||||||
<a name="label" val="Carry In"/>
|
<wire from="(200,170)" to="(260,170)"/>
|
||||||
</comp>
|
<wire from="(200,80)" to="(510,80)"/>
|
||||||
<comp loc="(540,80)" name="fullAdder"/>
|
<wire from="(460,280)" to="(510,280)"/>
|
||||||
<comp lib="0" loc="(140,70)" name="Pin">
|
<wire from="(570,100)" to="(630,100)"/>
|
||||||
<a name="width" val="8"/>
|
<wire from="(200,180)" to="(250,180)"/>
|
||||||
<a name="tristate" val="false"/>
|
<wire from="(270,170)" to="(270,190)"/>
|
||||||
<a name="label" val="A"/>
|
<wire from="(580,110)" to="(580,200)"/>
|
||||||
|
<wire from="(270,170)" to="(510,170)"/>
|
||||||
|
<wire from="(140,100)" to="(170,100)"/>
|
||||||
|
<wire from="(200,120)" to="(230,120)"/>
|
||||||
|
<wire from="(610,140)" to="(630,140)"/>
|
||||||
|
<wire from="(470,210)" to="(470,250)"/>
|
||||||
|
<wire from="(200,130)" to="(220,130)"/>
|
||||||
|
<wire from="(590,120)" to="(590,240)"/>
|
||||||
|
<wire from="(240,160)" to="(510,160)"/>
|
||||||
|
<wire from="(560,90)" to="(630,90)"/>
|
||||||
|
<wire from="(230,120)" to="(230,240)"/>
|
||||||
|
<wire from="(440,330)" to="(510,330)"/>
|
||||||
|
<wire from="(240,100)" to="(240,160)"/>
|
||||||
|
<wire from="(550,140)" to="(550,150)"/>
|
||||||
|
<wire from="(550,180)" to="(550,190)"/>
|
||||||
|
<wire from="(550,100)" to="(550,110)"/>
|
||||||
|
<wire from="(550,220)" to="(550,230)"/>
|
||||||
|
<wire from="(550,260)" to="(550,270)"/>
|
||||||
|
<wire from="(550,300)" to="(550,310)"/>
|
||||||
|
<wire from="(550,340)" to="(550,350)"/>
|
||||||
|
<wire from="(460,150)" to="(460,280)"/>
|
||||||
|
<wire from="(200,220)" to="(450,220)"/>
|
||||||
|
<wire from="(200,370)" to="(510,370)"/>
|
||||||
|
<wire from="(540,280)" to="(600,280)"/>
|
||||||
|
<wire from="(200,230)" to="(440,230)"/>
|
||||||
|
<wire from="(270,100)" to="(510,100)"/>
|
||||||
|
<wire from="(220,130)" to="(220,150)"/>
|
||||||
|
<wire from="(200,110)" to="(490,110)"/>
|
||||||
|
<wire from="(490,110)" to="(490,200)"/>
|
||||||
|
<wire from="(600,130)" to="(600,280)"/>
|
||||||
|
<wire from="(540,120)" to="(560,120)"/>
|
||||||
|
<wire from="(480,210)" to="(510,210)"/>
|
||||||
|
<wire from="(650,70)" to="(670,70)"/>
|
||||||
|
<wire from="(200,200)" to="(480,200)"/>
|
||||||
|
<wire from="(600,130)" to="(630,130)"/>
|
||||||
|
<wire from="(200,210)" to="(470,210)"/>
|
||||||
|
<wire from="(540,320)" to="(610,320)"/>
|
||||||
|
<wire from="(170,160)" to="(180,160)"/>
|
||||||
|
<wire from="(200,150)" to="(210,150)"/>
|
||||||
|
<wire from="(430,320)" to="(510,320)"/>
|
||||||
|
<wire from="(610,140)" to="(610,320)"/>
|
||||||
|
<comp lib="0" loc="(670,100)" name="Pin">
|
||||||
|
<a name="facing" val="west"/>
|
||||||
|
<a name="output" val="true"/>
|
||||||
|
<a name="label" val="Carry Out"/>
|
||||||
|
<a name="labelloc" val="east"/>
|
||||||
</comp>
|
</comp>
|
||||||
<comp lib="0" loc="(180,70)" name="Splitter">
|
<comp lib="0" loc="(180,70)" name="Splitter">
|
||||||
<a name="fanout" val="8"/>
|
<a name="fanout" val="8"/>
|
||||||
<a name="incoming" val="8"/>
|
<a name="incoming" val="8"/>
|
||||||
<a name="appear" val="right"/>
|
<a name="appear" val="right"/>
|
||||||
</comp>
|
</comp>
|
||||||
<comp loc="(540,120)" name="fullAdder"/>
|
|
||||||
<comp loc="(540,320)" name="fullAdder"/>
|
|
||||||
<comp loc="(540,360)" name="fullAdder"/>
|
|
||||||
<comp loc="(540,200)" name="fullAdder"/>
|
<comp loc="(540,200)" name="fullAdder"/>
|
||||||
<comp lib="0" loc="(180,160)" name="Splitter">
|
<comp lib="0" loc="(140,40)" name="Pin">
|
||||||
<a name="fanout" val="8"/>
|
<a name="tristate" val="false"/>
|
||||||
<a name="incoming" val="8"/>
|
<a name="label" val="Carry In"/>
|
||||||
<a name="appear" val="right"/>
|
</comp>
|
||||||
|
<comp loc="(540,360)" name="fullAdder"/>
|
||||||
|
<comp loc="(540,160)" name="fullAdder"/>
|
||||||
|
<comp lib="0" loc="(140,70)" name="Pin">
|
||||||
|
<a name="width" val="8"/>
|
||||||
|
<a name="tristate" val="false"/>
|
||||||
|
<a name="label" val="A"/>
|
||||||
</comp>
|
</comp>
|
||||||
<comp lib="0" loc="(140,100)" name="Pin">
|
<comp lib="0" loc="(140,100)" name="Pin">
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="tristate" val="false"/>
|
<a name="tristate" val="false"/>
|
||||||
<a name="label" val="B"/>
|
<a name="label" val="B"/>
|
||||||
</comp>
|
</comp>
|
||||||
|
<comp lib="0" loc="(670,70)" name="Pin">
|
||||||
|
<a name="facing" val="west"/>
|
||||||
|
<a name="output" val="true"/>
|
||||||
|
<a name="width" val="8"/>
|
||||||
|
<a name="label" val="Sum"/>
|
||||||
|
<a name="labelloc" val="east"/>
|
||||||
|
</comp>
|
||||||
|
<comp loc="(540,240)" name="fullAdder"/>
|
||||||
|
<comp loc="(540,80)" name="fullAdder"/>
|
||||||
|
<comp loc="(540,320)" name="fullAdder"/>
|
||||||
|
<comp loc="(540,280)" name="fullAdder"/>
|
||||||
|
<comp lib="0" loc="(180,160)" name="Splitter">
|
||||||
|
<a name="fanout" val="8"/>
|
||||||
|
<a name="incoming" val="8"/>
|
||||||
|
<a name="appear" val="right"/>
|
||||||
|
</comp>
|
||||||
|
<comp loc="(540,120)" name="fullAdder"/>
|
||||||
|
<comp lib="0" loc="(650,70)" name="Splitter">
|
||||||
|
<a name="facing" val="west"/>
|
||||||
|
<a name="fanout" val="8"/>
|
||||||
|
<a name="incoming" val="8"/>
|
||||||
|
</comp>
|
||||||
</circuit>
|
</circuit>
|
||||||
<circuit name="AND">
|
<circuit name="AND">
|
||||||
<a name="circuit" val="AND"/>
|
<a name="circuit" val="AND"/>
|
||||||
|
|
@ -410,24 +471,24 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
|
||||||
<wire from="(180,60)" to="(180,70)"/>
|
<wire from="(180,60)" to="(180,70)"/>
|
||||||
<wire from="(180,110)" to="(200,110)"/>
|
<wire from="(180,110)" to="(200,110)"/>
|
||||||
<wire from="(180,70)" to="(200,70)"/>
|
<wire from="(180,70)" to="(200,70)"/>
|
||||||
<comp lib="1" loc="(250,90)" name="AND Gate">
|
|
||||||
<a name="width" val="8"/>
|
|
||||||
<a name="inputs" val="2"/>
|
|
||||||
</comp>
|
|
||||||
<comp lib="0" loc="(120,60)" name="Pin">
|
|
||||||
<a name="width" val="8"/>
|
|
||||||
<a name="tristate" val="false"/>
|
|
||||||
</comp>
|
|
||||||
<comp lib="0" loc="(310,90)" name="Pin">
|
<comp lib="0" loc="(310,90)" name="Pin">
|
||||||
<a name="facing" val="west"/>
|
<a name="facing" val="west"/>
|
||||||
<a name="output" val="true"/>
|
<a name="output" val="true"/>
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="labelloc" val="east"/>
|
<a name="labelloc" val="east"/>
|
||||||
</comp>
|
</comp>
|
||||||
|
<comp lib="0" loc="(120,60)" name="Pin">
|
||||||
|
<a name="width" val="8"/>
|
||||||
|
<a name="tristate" val="false"/>
|
||||||
|
</comp>
|
||||||
<comp lib="0" loc="(120,120)" name="Pin">
|
<comp lib="0" loc="(120,120)" name="Pin">
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="tristate" val="false"/>
|
<a name="tristate" val="false"/>
|
||||||
</comp>
|
</comp>
|
||||||
|
<comp lib="1" loc="(250,90)" name="AND Gate">
|
||||||
|
<a name="width" val="8"/>
|
||||||
|
<a name="inputs" val="2"/>
|
||||||
|
</comp>
|
||||||
</circuit>
|
</circuit>
|
||||||
<circuit name="OR">
|
<circuit name="OR">
|
||||||
<a name="circuit" val="OR"/>
|
<a name="circuit" val="OR"/>
|
||||||
|
|
@ -441,9 +502,9 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
|
||||||
<wire from="(220,140)" to="(220,150)"/>
|
<wire from="(220,140)" to="(220,150)"/>
|
||||||
<wire from="(170,90)" to="(220,90)"/>
|
<wire from="(170,90)" to="(220,90)"/>
|
||||||
<wire from="(170,150)" to="(220,150)"/>
|
<wire from="(170,150)" to="(220,150)"/>
|
||||||
<comp lib="1" loc="(300,120)" name="OR Gate">
|
<comp lib="0" loc="(170,150)" name="Pin">
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="inputs" val="2"/>
|
<a name="tristate" val="false"/>
|
||||||
</comp>
|
</comp>
|
||||||
<comp lib="0" loc="(360,120)" name="Pin">
|
<comp lib="0" loc="(360,120)" name="Pin">
|
||||||
<a name="facing" val="west"/>
|
<a name="facing" val="west"/>
|
||||||
|
|
@ -451,14 +512,14 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="labelloc" val="east"/>
|
<a name="labelloc" val="east"/>
|
||||||
</comp>
|
</comp>
|
||||||
<comp lib="0" loc="(170,150)" name="Pin">
|
|
||||||
<a name="width" val="8"/>
|
|
||||||
<a name="tristate" val="false"/>
|
|
||||||
</comp>
|
|
||||||
<comp lib="0" loc="(170,90)" name="Pin">
|
<comp lib="0" loc="(170,90)" name="Pin">
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="tristate" val="false"/>
|
<a name="tristate" val="false"/>
|
||||||
</comp>
|
</comp>
|
||||||
|
<comp lib="1" loc="(300,120)" name="OR Gate">
|
||||||
|
<a name="width" val="8"/>
|
||||||
|
<a name="inputs" val="2"/>
|
||||||
|
</comp>
|
||||||
</circuit>
|
</circuit>
|
||||||
<circuit name="NOT A">
|
<circuit name="NOT A">
|
||||||
<a name="circuit" val="NOT A"/>
|
<a name="circuit" val="NOT A"/>
|
||||||
|
|
@ -467,16 +528,16 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
|
||||||
<a name="clabelfont" val="SansSerif plain 12"/>
|
<a name="clabelfont" val="SansSerif plain 12"/>
|
||||||
<wire from="(210,80)" to="(240,80)"/>
|
<wire from="(210,80)" to="(240,80)"/>
|
||||||
<wire from="(120,80)" to="(180,80)"/>
|
<wire from="(120,80)" to="(180,80)"/>
|
||||||
<comp lib="0" loc="(120,80)" name="Pin">
|
|
||||||
<a name="width" val="8"/>
|
|
||||||
<a name="tristate" val="false"/>
|
|
||||||
</comp>
|
|
||||||
<comp lib="0" loc="(240,80)" name="Pin">
|
<comp lib="0" loc="(240,80)" name="Pin">
|
||||||
<a name="facing" val="west"/>
|
<a name="facing" val="west"/>
|
||||||
<a name="output" val="true"/>
|
<a name="output" val="true"/>
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="labelloc" val="east"/>
|
<a name="labelloc" val="east"/>
|
||||||
</comp>
|
</comp>
|
||||||
|
<comp lib="0" loc="(120,80)" name="Pin">
|
||||||
|
<a name="width" val="8"/>
|
||||||
|
<a name="tristate" val="false"/>
|
||||||
|
</comp>
|
||||||
<comp lib="1" loc="(210,80)" name="NOT Gate">
|
<comp lib="1" loc="(210,80)" name="NOT Gate">
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
</comp>
|
</comp>
|
||||||
|
|
@ -488,15 +549,15 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
|
||||||
<a name="clabelfont" val="SansSerif plain 12"/>
|
<a name="clabelfont" val="SansSerif plain 12"/>
|
||||||
<wire from="(120,90)" to="(190,90)"/>
|
<wire from="(120,90)" to="(190,90)"/>
|
||||||
<wire from="(220,90)" to="(320,90)"/>
|
<wire from="(220,90)" to="(320,90)"/>
|
||||||
<comp lib="1" loc="(220,90)" name="NOT Gate">
|
|
||||||
<a name="width" val="8"/>
|
|
||||||
</comp>
|
|
||||||
<comp lib="0" loc="(320,90)" name="Pin">
|
<comp lib="0" loc="(320,90)" name="Pin">
|
||||||
<a name="facing" val="west"/>
|
<a name="facing" val="west"/>
|
||||||
<a name="output" val="true"/>
|
<a name="output" val="true"/>
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="labelloc" val="east"/>
|
<a name="labelloc" val="east"/>
|
||||||
</comp>
|
</comp>
|
||||||
|
<comp lib="1" loc="(220,90)" name="NOT Gate">
|
||||||
|
<a name="width" val="8"/>
|
||||||
|
</comp>
|
||||||
<comp lib="0" loc="(120,90)" name="Pin">
|
<comp lib="0" loc="(120,90)" name="Pin">
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="tristate" val="false"/>
|
<a name="tristate" val="false"/>
|
||||||
|
|
@ -514,23 +575,23 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
|
||||||
<wire from="(160,130)" to="(160,140)"/>
|
<wire from="(160,130)" to="(160,140)"/>
|
||||||
<wire from="(110,80)" to="(160,80)"/>
|
<wire from="(110,80)" to="(160,80)"/>
|
||||||
<wire from="(110,140)" to="(160,140)"/>
|
<wire from="(110,140)" to="(160,140)"/>
|
||||||
<comp lib="1" loc="(250,110)" name="XOR Gate">
|
|
||||||
<a name="width" val="8"/>
|
|
||||||
<a name="inputs" val="2"/>
|
|
||||||
</comp>
|
|
||||||
<comp lib="0" loc="(110,80)" name="Pin">
|
<comp lib="0" loc="(110,80)" name="Pin">
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="tristate" val="false"/>
|
<a name="tristate" val="false"/>
|
||||||
</comp>
|
</comp>
|
||||||
|
<comp lib="0" loc="(110,140)" name="Pin">
|
||||||
|
<a name="width" val="8"/>
|
||||||
|
<a name="tristate" val="false"/>
|
||||||
|
</comp>
|
||||||
<comp lib="0" loc="(310,110)" name="Pin">
|
<comp lib="0" loc="(310,110)" name="Pin">
|
||||||
<a name="facing" val="west"/>
|
<a name="facing" val="west"/>
|
||||||
<a name="output" val="true"/>
|
<a name="output" val="true"/>
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="labelloc" val="east"/>
|
<a name="labelloc" val="east"/>
|
||||||
</comp>
|
</comp>
|
||||||
<comp lib="0" loc="(110,140)" name="Pin">
|
<comp lib="1" loc="(250,110)" name="XOR Gate">
|
||||||
<a name="width" val="8"/>
|
<a name="width" val="8"/>
|
||||||
<a name="tristate" val="false"/>
|
<a name="inputs" val="2"/>
|
||||||
</comp>
|
</comp>
|
||||||
</circuit>
|
</circuit>
|
||||||
</project>
|
</project>
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue