fermi/ser-2016-aialu
fermi/ser-2016-aialu
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Added the two subcircuits

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Steffo 2016-02-17 10:24:37 +01:00
parent ed1b8accf5
commit f4ebe67c36
1 changed files with 15 additions and 3 deletions
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18
aiAlu.circ
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@ -15,7 +15,7 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
<a name="valign" val="base"/> <a name="valign" val="base"/>
</tool> </tool>
</lib> </lib>
<main name="main"/> <main name="aiALU"/>
<options> <options>
<a name="gateUndefined" val="ignore"/> <a name="gateUndefined" val="ignore"/>
<a name="simlimit" val="1000"/> <a name="simlimit" val="1000"/>
@ -48,8 +48,20 @@ This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
<tool lib="1" name="AND Gate"/> <tool lib="1" name="AND Gate"/>
<tool lib="1" name="OR Gate"/> <tool lib="1" name="OR Gate"/>
</toolbar> </toolbar>
<circuit name="main"> <circuit name="aiALU">
<a name="circuit" val="main"/> <a name="circuit" val="aiALU"/>
<a name="clabel" val=""/>
<a name="clabelup" val="east"/>
<a name="clabelfont" val="SansSerif plain 12"/>
</circuit>
<circuit name="aiArith">
<a name="circuit" val="aiArith"/>
<a name="clabel" val=""/>
<a name="clabelup" val="east"/>
<a name="clabelfont" val="SansSerif plain 12"/>
</circuit>
<circuit name="aiLogic">
<a name="circuit" val="aiLogic"/>
<a name="clabel" val=""/> <a name="clabel" val=""/>
<a name="clabelup" val="east"/> <a name="clabelup" val="east"/>
<a name="clabelfont" val="SansSerif plain 12"/> <a name="clabelfont" val="SansSerif plain 12"/>