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27 commits

Author SHA1 Message Date
403110c7fb Added Carry Out 2016-03-09 10:46:38 +01:00
IL-GRANDE-INFORMATICO
b0bea2f9f2 FIXED INPUT ON AILOGIC 2016-03-09 09:43:59 +01:00
b87d557177 Improved supercircuit images 2016-03-09 09:37:36 +01:00
887e65df94 Improved overflow detection 2016-03-09 09:30:04 +01:00
b337f46535 Completed aiAlu 2016-03-08 13:45:47 +01:00
504626d9f1 Fixed aiLogic supercircuit 2016-03-08 13:29:13 +01:00
cd3d2bd8f1 Fixed overflow check 2016-03-08 13:26:19 +01:00
IL-GRANDE-INFORMATICO
a40ecf9ba5 aiLogic
i add aiLogic
2016-03-02 10:50:16 +01:00
0430978b50 Improved aiArith to use the new MUX 2016-03-02 10:28:40 +01:00
845a26d7a3 Shaped the 8-data MUX 2016-03-02 10:26:57 +01:00
be113ab4ff Added a MUX that can use 8-width cables 2016-03-02 10:24:59 +01:00
366e3c867e Fixed overflow check 2016-03-02 10:13:05 +01:00
IL-GRANDE-INFORMATICO
4f9adc5acf Aggiornamento and or not xor
Ho aggiornato come da te richiesto le seguenti porte logiche
2016-03-02 09:52:00 +01:00
f8d81e210d Added overflowCheck to aiArith 2016-02-25 16:41:08 +01:00
2ee1b141d5 Added the select bit to aiArith
Probably needs to be improved.
2016-02-25 16:40:48 +01:00
4d9c7d9d1b Added the new parts to aiArith 2016-02-25 16:14:46 +01:00
59b9a8e881 Added two's complement 2016-02-25 16:09:23 +01:00
f2c10b506b Fixed pin placement on aiSum 2016-02-25 16:02:31 +01:00
9b367ea2ea Finished aiSum
Started in 410730461e
2016-02-25 15:59:12 +01:00
IL-GRANDE-INFORMATICO
3aadc36542 AND, OR , XOR, NOT a, NOT b
did aiLogic part of aiAlu
2016-02-24 18:09:01 +01:00
410730461e UNFINISHED: Added aiSum 2016-02-17 10:49:26 +01:00
60207567f9 Changed the shape of the MUX 2016-02-17 10:40:31 +01:00
a92c0eebcc Added full adder 2016-02-17 10:37:44 +01:00
5bdfce4f5e Added 4 inputs multiplexer. 2016-02-17 10:32:54 +01:00
b139f008dd Removed disallowed libraries 2016-02-17 10:25:22 +01:00
f4ebe67c36 Added the two subcircuits 2016-02-17 10:24:37 +01:00
ed1b8accf5 Added the base file 2016-02-17 10:02:45 +01:00