Merge branch 'sched/urgent' into sched/core
This commit is contained in:
commit
258594a138
195 changed files with 3840 additions and 1291 deletions
|
@ -21,11 +21,14 @@ This driver is known to work with the following cards:
|
|||
* SA E200
|
||||
* SA E200i
|
||||
* SA E500
|
||||
* SA P700m
|
||||
* SA P212
|
||||
* SA P410
|
||||
* SA P410i
|
||||
* SA P411
|
||||
* SA P812
|
||||
* SA P712m
|
||||
* SA P711m
|
||||
|
||||
Detecting drive failures:
|
||||
-------------------------
|
||||
|
|
|
@ -213,4 +213,29 @@ TkRat (GUI)
|
|||
|
||||
Works. Use "Insert file..." or external editor.
|
||||
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
Gmail (Web GUI)
|
||||
|
||||
If you just have to use Gmail to send patches, it CAN be made to work. It
|
||||
requires a bit of external help, though.
|
||||
|
||||
The first problem is that Gmail converts tabs to spaces. This will
|
||||
totally break your patches. To prevent this, you have to use a different
|
||||
editor. There is a firefox extension called "ViewSourceWith"
|
||||
(https://addons.mozilla.org/en-US/firefox/addon/394) which allows you to
|
||||
edit any text box in the editor of your choice. Configure it to launch
|
||||
your favorite editor. When you want to send a patch, use this technique.
|
||||
Once you have crafted your messsage + patch, save and exit the editor,
|
||||
which should reload the Gmail edit box. GMAIL WILL PRESERVE THE TABS.
|
||||
Hoorah. Apparently you can cut-n-paste literal tabs, but Gmail will
|
||||
convert those to spaces upon sending!
|
||||
|
||||
The second problem is that Gmail converts tabs to spaces on replies. If
|
||||
you reply to a patch, don't expect to be able to apply it as a patch.
|
||||
|
||||
The last problem is that Gmail will base64-encode any message that has a
|
||||
non-ASCII character. That includes things like European names. Be aware.
|
||||
|
||||
Gmail is not convenient for lkml patches, but CAN be made to work.
|
||||
|
||||
###
|
||||
|
|
|
@ -8,6 +8,12 @@ if you want to format from within Linux.
|
|||
|
||||
VFAT MOUNT OPTIONS
|
||||
----------------------------------------------------------------------
|
||||
uid=### -- Set the owner of all files on this filesystem.
|
||||
The default is the uid of current process.
|
||||
|
||||
gid=### -- Set the group of all files on this filesystem.
|
||||
The default is the gid of current process.
|
||||
|
||||
umask=### -- The permission mask (for files and directories, see umask(1)).
|
||||
The default is the umask of current process.
|
||||
|
||||
|
@ -36,7 +42,7 @@ codepage=### -- Sets the codepage number for converting to shortname
|
|||
characters on FAT filesystem.
|
||||
By default, FAT_DEFAULT_CODEPAGE setting is used.
|
||||
|
||||
iocharset=name -- Character set to use for converting between the
|
||||
iocharset=<name> -- Character set to use for converting between the
|
||||
encoding is used for user visible filename and 16 bit
|
||||
Unicode characters. Long filenames are stored on disk
|
||||
in Unicode format, but Unix for the most part doesn't
|
||||
|
@ -86,6 +92,8 @@ check=s|r|n -- Case sensitivity checking setting.
|
|||
r: relaxed, case insensitive
|
||||
n: normal, default setting, currently case insensitive
|
||||
|
||||
nocase -- This was deprecated for vfat. Use shortname=win95 instead.
|
||||
|
||||
shortname=lower|win95|winnt|mixed
|
||||
-- Shortname display/create setting.
|
||||
lower: convert to lowercase for display,
|
||||
|
@ -99,11 +107,31 @@ shortname=lower|win95|winnt|mixed
|
|||
tz=UTC -- Interpret timestamps as UTC rather than local time.
|
||||
This option disables the conversion of timestamps
|
||||
between local time (as used by Windows on FAT) and UTC
|
||||
(which Linux uses internally). This is particuluarly
|
||||
(which Linux uses internally). This is particularly
|
||||
useful when mounting devices (like digital cameras)
|
||||
that are set to UTC in order to avoid the pitfalls of
|
||||
local time.
|
||||
|
||||
showexec -- If set, the execute permission bits of the file will be
|
||||
allowed only if the extension part of the name is .EXE,
|
||||
.COM, or .BAT. Not set by default.
|
||||
|
||||
debug -- Can be set, but unused by the current implementation.
|
||||
|
||||
sys_immutable -- If set, ATTR_SYS attribute on FAT is handled as
|
||||
IMMUTABLE flag on Linux. Not set by default.
|
||||
|
||||
flush -- If set, the filesystem will try to flush to disk more
|
||||
early than normal. Not set by default.
|
||||
|
||||
rodir -- FAT has the ATTR_RO (read-only) attribute. But on Windows,
|
||||
the ATTR_RO of the directory will be just ignored actually,
|
||||
and is used by only applications as flag. E.g. it's setted
|
||||
for the customized folder.
|
||||
|
||||
If you want to use ATTR_RO as read-only flag even for
|
||||
the directory, set this option.
|
||||
|
||||
<bool>: 0,1,yes,no,true,false
|
||||
|
||||
TODO
|
||||
|
|
82
Documentation/io-mapping.txt
Normal file
82
Documentation/io-mapping.txt
Normal file
|
@ -0,0 +1,82 @@
|
|||
The io_mapping functions in linux/io-mapping.h provide an abstraction for
|
||||
efficiently mapping small regions of an I/O device to the CPU. The initial
|
||||
usage is to support the large graphics aperture on 32-bit processors where
|
||||
ioremap_wc cannot be used to statically map the entire aperture to the CPU
|
||||
as it would consume too much of the kernel address space.
|
||||
|
||||
A mapping object is created during driver initialization using
|
||||
|
||||
struct io_mapping *io_mapping_create_wc(unsigned long base,
|
||||
unsigned long size)
|
||||
|
||||
'base' is the bus address of the region to be made
|
||||
mappable, while 'size' indicates how large a mapping region to
|
||||
enable. Both are in bytes.
|
||||
|
||||
This _wc variant provides a mapping which may only be used
|
||||
with the io_mapping_map_atomic_wc or io_mapping_map_wc.
|
||||
|
||||
With this mapping object, individual pages can be mapped either atomically
|
||||
or not, depending on the necessary scheduling environment. Of course, atomic
|
||||
maps are more efficient:
|
||||
|
||||
void *io_mapping_map_atomic_wc(struct io_mapping *mapping,
|
||||
unsigned long offset)
|
||||
|
||||
'offset' is the offset within the defined mapping region.
|
||||
Accessing addresses beyond the region specified in the
|
||||
creation function yields undefined results. Using an offset
|
||||
which is not page aligned yields an undefined result. The
|
||||
return value points to a single page in CPU address space.
|
||||
|
||||
This _wc variant returns a write-combining map to the
|
||||
page and may only be used with mappings created by
|
||||
io_mapping_create_wc
|
||||
|
||||
Note that the task may not sleep while holding this page
|
||||
mapped.
|
||||
|
||||
void io_mapping_unmap_atomic(void *vaddr)
|
||||
|
||||
'vaddr' must be the the value returned by the last
|
||||
io_mapping_map_atomic_wc call. This unmaps the specified
|
||||
page and allows the task to sleep once again.
|
||||
|
||||
If you need to sleep while holding the lock, you can use the non-atomic
|
||||
variant, although they may be significantly slower.
|
||||
|
||||
void *io_mapping_map_wc(struct io_mapping *mapping,
|
||||
unsigned long offset)
|
||||
|
||||
This works like io_mapping_map_atomic_wc except it allows
|
||||
the task to sleep while holding the page mapped.
|
||||
|
||||
void io_mapping_unmap(void *vaddr)
|
||||
|
||||
This works like io_mapping_unmap_atomic, except it is used
|
||||
for pages mapped with io_mapping_map_wc.
|
||||
|
||||
At driver close time, the io_mapping object must be freed:
|
||||
|
||||
void io_mapping_free(struct io_mapping *mapping)
|
||||
|
||||
Current Implementation:
|
||||
|
||||
The initial implementation of these functions uses existing mapping
|
||||
mechanisms and so provides only an abstraction layer and no new
|
||||
functionality.
|
||||
|
||||
On 64-bit processors, io_mapping_create_wc calls ioremap_wc for the whole
|
||||
range, creating a permanent kernel-visible mapping to the resource. The
|
||||
map_atomic and map functions add the requested offset to the base of the
|
||||
virtual address returned by ioremap_wc.
|
||||
|
||||
On 32-bit processors with HIGHMEM defined, io_mapping_map_atomic_wc uses
|
||||
kmap_atomic_pfn to map the specified page in an atomic fashion;
|
||||
kmap_atomic_pfn isn't really supposed to be used with device pages, but it
|
||||
provides an efficient mapping for this usage.
|
||||
|
||||
On 32-bit processors without HIGHMEM defined, io_mapping_map_atomic_wc and
|
||||
io_mapping_map_wc both use ioremap_wc, a terribly inefficient function which
|
||||
performs an IPI to inform all processors about the new mapping. This results
|
||||
in a significant performance penalty.
|
|
@ -995,13 +995,15 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
Format:
|
||||
<cpu number>,...,<cpu number>
|
||||
or
|
||||
<cpu number>-<cpu number> (must be a positive range in ascending order)
|
||||
<cpu number>-<cpu number>
|
||||
(must be a positive range in ascending order)
|
||||
or a mixture
|
||||
<cpu number>,...,<cpu number>-<cpu number>
|
||||
|
||||
This option can be used to specify one or more CPUs
|
||||
to isolate from the general SMP balancing and scheduling
|
||||
algorithms. The only way to move a process onto or off
|
||||
an "isolated" CPU is via the CPU affinity syscalls.
|
||||
algorithms. You can move a process onto or off an
|
||||
"isolated" CPU via the CPU affinity syscalls or cpuset.
|
||||
<cpu number> begins at 0 and the maximum value is
|
||||
"number of CPUs in system - 1".
|
||||
|
||||
|
@ -1470,8 +1472,6 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
Valid arguments: on, off
|
||||
Default: on
|
||||
|
||||
noirqbalance [X86-32,SMP,KNL] Disable kernel irq balancing
|
||||
|
||||
noirqdebug [X86-32] Disables the code which attempts to detect and
|
||||
disable unhandled interrupt sources.
|
||||
|
||||
|
|
|
@ -721,7 +721,7 @@ W: http://sourceforge.net/projects/acpi4asus
|
|||
W: http://xf.iksaif.net/acpi4asus
|
||||
S: Maintained
|
||||
|
||||
ASYNCHRONOUS TRANSFERS/TRANSFORMS API
|
||||
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
|
||||
P: Dan Williams
|
||||
M: dan.j.williams@intel.com
|
||||
P: Maciej Sosnowski
|
||||
|
|
|
@ -44,10 +44,10 @@
|
|||
* The module space lives between the addresses given by TASK_SIZE
|
||||
* and PAGE_OFFSET - it must be within 32MB of the kernel text.
|
||||
*/
|
||||
#define MODULE_END (PAGE_OFFSET)
|
||||
#define MODULE_START (MODULE_END - 16*1048576)
|
||||
#define MODULES_END (PAGE_OFFSET)
|
||||
#define MODULES_VADDR (MODULES_END - 16*1048576)
|
||||
|
||||
#if TASK_SIZE > MODULE_START
|
||||
#if TASK_SIZE > MODULES_VADDR
|
||||
#error Top of user space clashes with start of module space
|
||||
#endif
|
||||
|
||||
|
@ -56,7 +56,7 @@
|
|||
* Since we use sections to map it, this macro replaces the physical address
|
||||
* with its virtual address while keeping offset from the base section.
|
||||
*/
|
||||
#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff))
|
||||
#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
|
||||
|
||||
/*
|
||||
* Allow 16MB-aligned ioremap pages
|
||||
|
@ -94,8 +94,8 @@
|
|||
/*
|
||||
* The module can be at any place in ram in nommu mode.
|
||||
*/
|
||||
#define MODULE_END (END_MEM)
|
||||
#define MODULE_START (PHYS_OFFSET)
|
||||
#define MODULES_END (END_MEM)
|
||||
#define MODULES_VADDR (PHYS_OFFSET)
|
||||
|
||||
#endif /* !CONFIG_MMU */
|
||||
|
||||
|
|
|
@ -42,6 +42,10 @@
|
|||
#define CR_U (1 << 22) /* Unaligned access operation */
|
||||
#define CR_XP (1 << 23) /* Extended page tables */
|
||||
#define CR_VE (1 << 24) /* Vectored interrupts */
|
||||
#define CR_EE (1 << 25) /* Exception (Big) Endian */
|
||||
#define CR_TRE (1 << 28) /* TEX remap enable */
|
||||
#define CR_AFE (1 << 29) /* Access flag enable */
|
||||
#define CR_TE (1 << 30) /* Thumb exception enable */
|
||||
|
||||
/*
|
||||
* This is used to ensure the compiler did actually allocate the register we
|
||||
|
|
|
@ -21,12 +21,16 @@ int elf_check_arch(const struct elf32_hdr *x)
|
|||
|
||||
eflags = x->e_flags;
|
||||
if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) {
|
||||
unsigned int flt_fmt;
|
||||
|
||||
/* APCS26 is only allowed if the CPU supports it */
|
||||
if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT))
|
||||
return 0;
|
||||
|
||||
flt_fmt = eflags & (EF_ARM_VFP_FLOAT | EF_ARM_SOFT_FLOAT);
|
||||
|
||||
/* VFP requires the supporting code */
|
||||
if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP))
|
||||
if (flt_fmt == EF_ARM_VFP_FLOAT && !(elf_hwcap & HWCAP_VFP))
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
|
|
|
@ -26,12 +26,12 @@
|
|||
/*
|
||||
* The XIP kernel text is mapped in the module area for modules and
|
||||
* some other stuff to work without any indirect relocations.
|
||||
* MODULE_START is redefined here and not in asm/memory.h to avoid
|
||||
* MODULES_VADDR is redefined here and not in asm/memory.h to avoid
|
||||
* recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
|
||||
*/
|
||||
extern void _etext;
|
||||
#undef MODULE_START
|
||||
#define MODULE_START (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
|
||||
#undef MODULES_VADDR
|
||||
#define MODULES_VADDR (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
|
@ -43,7 +43,7 @@ void *module_alloc(unsigned long size)
|
|||
if (!size)
|
||||
return NULL;
|
||||
|
||||
area = __get_vm_area(size, VM_ALLOC, MODULE_START, MODULE_END);
|
||||
area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END);
|
||||
if (!area)
|
||||
return NULL;
|
||||
|
||||
|
|
|
@ -429,18 +429,16 @@ void __init gpmc_init(void)
|
|||
gpmc_l3_clk = clk_get(NULL, ck);
|
||||
if (IS_ERR(gpmc_l3_clk)) {
|
||||
printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
|
||||
return -ENODEV;
|
||||
BUG();
|
||||
}
|
||||
|
||||
gpmc_base = ioremap(l, SZ_4K);
|
||||
if (!gpmc_base) {
|
||||
clk_put(gpmc_l3_clk);
|
||||
printk(KERN_ERR "Could not get GPMC register memory\n");
|
||||
return -ENOMEM;
|
||||
BUG();
|
||||
}
|
||||
|
||||
BUG_ON(IS_ERR(gpmc_l3_clk));
|
||||
|
||||
l = gpmc_read_reg(GPMC_REVISION);
|
||||
printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
|
||||
/* Set smart idle mode and automatic L3 clock gating */
|
||||
|
|
|
@ -98,7 +98,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end)
|
|||
/*
|
||||
* Clean and invalidate partial last cache line.
|
||||
*/
|
||||
if (end & (CACHE_LINE_SIZE - 1)) {
|
||||
if (start < end && (end & (CACHE_LINE_SIZE - 1))) {
|
||||
xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1));
|
||||
xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
|
||||
end &= ~(CACHE_LINE_SIZE - 1);
|
||||
|
@ -107,7 +107,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end)
|
|||
/*
|
||||
* Invalidate all full cache lines between 'start' and 'end'.
|
||||
*/
|
||||
while (start != end) {
|
||||
while (start < end) {
|
||||
xsc3_l2_inv_pa(start);
|
||||
start += CACHE_LINE_SIZE;
|
||||
}
|
||||
|
|
|
@ -180,20 +180,20 @@ void adjust_cr(unsigned long mask, unsigned long set)
|
|||
#endif
|
||||
|
||||
#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE
|
||||
#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE
|
||||
#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE
|
||||
|
||||
static struct mem_type mem_types[] = {
|
||||
[MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */
|
||||
.prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED |
|
||||
L_PTE_SHARED,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED,
|
||||
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_S,
|
||||
.domain = DOMAIN_IO,
|
||||
},
|
||||
[MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */
|
||||
.prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2),
|
||||
.prot_sect = PROT_SECT_DEVICE,
|
||||
.domain = DOMAIN_IO,
|
||||
},
|
||||
[MT_DEVICE_CACHED] = { /* ioremap_cached */
|
||||
|
@ -205,7 +205,7 @@ static struct mem_type mem_types[] = {
|
|||
[MT_DEVICE_WC] = { /* ioremap_wc */
|
||||
.prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE,
|
||||
.prot_sect = PROT_SECT_DEVICE,
|
||||
.domain = DOMAIN_IO,
|
||||
},
|
||||
[MT_CACHECLEAN] = {
|
||||
|
@ -273,22 +273,23 @@ static void __init build_mem_type_table(void)
|
|||
#endif
|
||||
|
||||
/*
|
||||
* On non-Xscale3 ARMv5-and-older systems, use CB=01
|
||||
* (Uncached/Buffered) for ioremap_wc() mappings. On XScale3
|
||||
* and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable
|
||||
* in xsc3 parlance, Uncached Normal in ARMv6 parlance).
|
||||
* Strip out features not present on earlier architectures.
|
||||
* Pre-ARMv5 CPUs don't have TEX bits. Pre-ARMv6 CPUs or those
|
||||
* without extended page tables don't have the 'Shared' bit.
|
||||
*/
|
||||
if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
|
||||
mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE;
|
||||
}
|
||||
if (cpu_arch < CPU_ARCH_ARMv5)
|
||||
for (i = 0; i < ARRAY_SIZE(mem_types); i++)
|
||||
mem_types[i].prot_sect &= ~PMD_SECT_TEX(7);
|
||||
if ((cpu_arch < CPU_ARCH_ARMv6 || !(cr & CR_XP)) && !cpu_is_xsc3())
|
||||
for (i = 0; i < ARRAY_SIZE(mem_types); i++)
|
||||
mem_types[i].prot_sect &= ~PMD_SECT_S;
|
||||
|
||||
/*
|
||||
* ARMv5 and lower, bit 4 must be set for page tables.
|
||||
* (was: cache "update-able on write" bit on ARM610)
|
||||
* However, Xscale cores require this bit to be cleared.
|
||||
* ARMv5 and lower, bit 4 must be set for page tables (was: cache
|
||||
* "update-able on write" bit on ARM610). However, Xscale and
|
||||
* Xscale3 require this bit to be cleared.
|
||||
*/
|
||||
if (cpu_is_xscale()) {
|
||||
if (cpu_is_xscale() || cpu_is_xsc3()) {
|
||||
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
|
||||
mem_types[i].prot_sect &= ~PMD_BIT4;
|
||||
mem_types[i].prot_l1 &= ~PMD_BIT4;
|
||||
|
@ -302,6 +303,64 @@ static void __init build_mem_type_table(void)
|
|||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Mark the device areas according to the CPU/architecture.
|
||||
*/
|
||||
if (cpu_is_xsc3() || (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP))) {
|
||||
if (!cpu_is_xsc3()) {
|
||||
/*
|
||||
* Mark device regions on ARMv6+ as execute-never
|
||||
* to prevent speculative instruction fetches.
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_XN;
|
||||
mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_XN;
|
||||
mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_XN;
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_XN;
|
||||
}
|
||||
if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
|
||||
/*
|
||||
* For ARMv7 with TEX remapping,
|
||||
* - shared device is SXCB=1100
|
||||
* - nonshared device is SXCB=0100
|
||||
* - write combine device mem is SXCB=0001
|
||||
* (Uncached Normal memory)
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1);
|
||||
mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(1);
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
|
||||
} else if (cpu_is_xsc3()) {
|
||||
/*
|
||||
* For Xscale3,
|
||||
* - shared device is TEXCB=00101
|
||||
* - nonshared device is TEXCB=01000
|
||||
* - write combine device mem is TEXCB=00100
|
||||
* (Inner/Outer Uncacheable in xsc3 parlance)
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1) | PMD_SECT_BUFFERED;
|
||||
mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2);
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
|
||||
} else {
|
||||
/*
|
||||
* For ARMv6 and ARMv7 without TEX remapping,
|
||||
* - shared device is TEXCB=00001
|
||||
* - nonshared device is TEXCB=01000
|
||||
* - write combine device mem is TEXCB=00100
|
||||
* (Uncached Normal in ARMv6 parlance).
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
|
||||
mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2);
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* On others, write combining is "Uncached/Buffered"
|
||||
*/
|
||||
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now deal with the memory-type mappings
|
||||
*/
|
||||
cp = &cache_policies[cachepolicy];
|
||||
vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
|
||||
|
||||
|
@ -317,12 +376,8 @@ static void __init build_mem_type_table(void)
|
|||
* Enable CPU-specific coherency if supported.
|
||||
* (Only available on XSC3 at the moment.)
|
||||
*/
|
||||
if (arch_is_coherent()) {
|
||||
if (cpu_is_xsc3()) {
|
||||
if (arch_is_coherent() && cpu_is_xsc3())
|
||||
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
|
||||
mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* ARMv6 and above have extended page tables.
|
||||
|
@ -336,11 +391,6 @@ static void __init build_mem_type_table(void)
|
|||
mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
|
||||
mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
|
||||
|
||||
/*
|
||||
* Mark the device area as "shared device"
|
||||
*/
|
||||
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/*
|
||||
* Mark memory with the "shared" attribute for SMP systems
|
||||
|
@ -360,9 +410,6 @@ static void __init build_mem_type_table(void)
|
|||
mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot;
|
||||
mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot;
|
||||
|
||||
if (cpu_arch < CPU_ARCH_ARMv5)
|
||||
mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1);
|
||||
|
||||
pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);
|
||||
pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |
|
||||
L_PTE_DIRTY | L_PTE_WRITE |
|
||||
|
@ -654,7 +701,7 @@ static inline void prepare_page_table(struct meminfo *mi)
|
|||
/*
|
||||
* Clear out all the mappings below the kernel image.
|
||||
*/
|
||||
for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE)
|
||||
for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE)
|
||||
pmd_clear(pmd_off_k(addr));
|
||||
|
||||
#ifdef CONFIG_XIP_KERNEL
|
||||
|
@ -766,7 +813,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
|
|||
*/
|
||||
#ifdef CONFIG_XIP_KERNEL
|
||||
map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK);
|
||||
map.virtual = MODULE_START;
|
||||
map.virtual = MODULES_VADDR;
|
||||
map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
|
||||
map.type = MT_ROM;
|
||||
create_mapping(&map);
|
||||
|
|
|
@ -115,7 +115,7 @@ ENTRY(cpu_v7_set_pte_ext)
|
|||
orr r3, r3, r2
|
||||
orr r3, r3, #PTE_EXT_AP0 | 2
|
||||
|
||||
tst r2, #1 << 4
|
||||
tst r1, #1 << 4
|
||||
orrne r3, r3, #PTE_EXT_TEX(1)
|
||||
|
||||
tst r1, #L_PTE_WRITE
|
||||
|
@ -192,11 +192,11 @@ __v7_setup:
|
|||
mov pc, lr @ return to head.S:__ret
|
||||
ENDPROC(__v7_setup)
|
||||
|
||||
/*
|
||||
* V X F I D LR
|
||||
* .... ...E PUI. .T.T 4RVI ZFRS BLDP WCAM
|
||||
* rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced
|
||||
* 0 110 0011 1.00 .111 1101 < we want
|
||||
/* AT
|
||||
* TFR EV X F I D LR
|
||||
* .EEE ..EE PUI. .T.T 4RVI ZFRS BLDP WCAM
|
||||
* rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
|
||||
* 1 0 110 0011 1.00 .111 1101 < we want
|
||||
*/
|
||||
.type v7_crval, #object
|
||||
v7_crval:
|
||||
|
|
|
@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c)
|
|||
if (c->id != 0)
|
||||
sprintf(p, ":%d", c->id);
|
||||
d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
|
||||
if (IS_ERR(d))
|
||||
return PTR_ERR(d);
|
||||
if (!d)
|
||||
return -ENOMEM;
|
||||
c->dent = d;
|
||||
|
||||
d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
|
||||
if (IS_ERR(d)) {
|
||||
err = PTR_ERR(d);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
}
|
||||
d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
|
||||
if (IS_ERR(d)) {
|
||||
err = PTR_ERR(d);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
}
|
||||
d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
|
||||
if (IS_ERR(d)) {
|
||||
err = PTR_ERR(d);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
}
|
||||
return 0;
|
||||
|
@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void)
|
|||
int err;
|
||||
|
||||
d = debugfs_create_dir("clock", NULL);
|
||||
if (IS_ERR(d))
|
||||
return PTR_ERR(d);
|
||||
if (!d)
|
||||
return -ENOMEM;
|
||||
clk_debugfs_root = d;
|
||||
|
||||
list_for_each_entry(c, &clocks, node) {
|
||||
|
|
|
@ -65,7 +65,8 @@
|
|||
#include <mach/omap34xx.h>
|
||||
#endif
|
||||
|
||||
#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */
|
||||
#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
|
||||
#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
|
||||
|
||||
.macro disable_fiq
|
||||
.endm
|
||||
|
@ -88,6 +89,7 @@
|
|||
cmp \irqnr, #0x0
|
||||
2222:
|
||||
ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
|
||||
and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
|
||||
|
||||
.endm
|
||||
|
||||
|
|
|
@ -372,7 +372,7 @@
|
|||
|
||||
/* External TWL4030 gpio interrupts are optional */
|
||||
#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END
|
||||
#ifdef CONFIG_TWL4030_GPIO
|
||||
#ifdef CONFIG_GPIO_TWL4030
|
||||
#define TWL4030_GPIO_NR_IRQS 18
|
||||
#else
|
||||
#define TWL4030_GPIO_NR_IRQS 0
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/kexec.h>
|
||||
#include <linux/crash_dump.h>
|
||||
|
||||
#include <asm/kexec.h>
|
||||
#include <asm/reg.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/prom.h>
|
||||
|
|
|
@ -189,7 +189,6 @@ struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
|
|||
{
|
||||
struct pci_controller *phb;
|
||||
int primary;
|
||||
struct pci_bus *b;
|
||||
|
||||
primary = list_empty(&hose_list);
|
||||
phb = pcibios_alloc_controller(dn);
|
||||
|
|
|
@ -1494,7 +1494,7 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
|
|||
def_bool X86_64
|
||||
depends on NUMA
|
||||
|
||||
menu "Power management options"
|
||||
menu "Power management and ACPI options"
|
||||
depends on !X86_VOYAGER
|
||||
|
||||
config ARCH_HIBERNATION_HEADER
|
||||
|
@ -1894,6 +1894,10 @@ config SYSVIPC_COMPAT
|
|||
endmenu
|
||||
|
||||
|
||||
config HAVE_ATOMIC_IOMAP
|
||||
def_bool y
|
||||
depends on X86_32
|
||||
|
||||
source "net/Kconfig"
|
||||
|
||||
source "drivers/Kconfig"
|
||||
|
|
|
@ -9,6 +9,10 @@
|
|||
|
||||
extern int fixmaps_set;
|
||||
|
||||
extern pte_t *kmap_pte;
|
||||
extern pgprot_t kmap_prot;
|
||||
extern pte_t *pkmap_page_table;
|
||||
|
||||
void __native_set_fixmap(enum fixed_addresses idx, pte_t pte);
|
||||
void native_set_fixmap(enum fixed_addresses idx,
|
||||
unsigned long phys, pgprot_t flags);
|
||||
|
|
|
@ -28,10 +28,8 @@ extern unsigned long __FIXADDR_TOP;
|
|||
#include <asm/acpi.h>
|
||||
#include <asm/apicdef.h>
|
||||
#include <asm/page.h>
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
#include <linux/threads.h>
|
||||
#include <asm/kmap_types.h>
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Here we define all the compile-time 'special' virtual
|
||||
|
@ -75,10 +73,8 @@ enum fixed_addresses {
|
|||
#ifdef CONFIG_X86_CYCLONE_TIMER
|
||||
FIX_CYCLONE_TIMER, /*cyclone timer register*/
|
||||
#endif
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
|
||||
FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
|
||||
#endif
|
||||
#ifdef CONFIG_PCI_MMCONFIG
|
||||
FIX_PCIE_MCFG,
|
||||
#endif
|
||||
|
|
|
@ -25,14 +25,11 @@
|
|||
#include <asm/kmap_types.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/paravirt.h>
|
||||
#include <asm/fixmap.h>
|
||||
|
||||
/* declarations for highmem.c */
|
||||
extern unsigned long highstart_pfn, highend_pfn;
|
||||
|
||||
extern pte_t *kmap_pte;
|
||||
extern pgprot_t kmap_prot;
|
||||
extern pte_t *pkmap_page_table;
|
||||
|
||||
/*
|
||||
* Right now we initialize only a single pte table. It can be extended
|
||||
* easily, subsequent pte tables have to be allocated in one physical
|
||||
|
|
|
@ -101,31 +101,23 @@
|
|||
#define LAST_VM86_IRQ 15
|
||||
#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
#if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER)
|
||||
# if NR_CPUS < MAX_IO_APICS
|
||||
# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
|
||||
# else
|
||||
# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
|
||||
# endif
|
||||
|
||||
#elif !defined(CONFIG_X86_VOYAGER)
|
||||
|
||||
# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS)
|
||||
#elif defined(CONFIG_X86_VOYAGER)
|
||||
|
||||
# define NR_IRQS 224
|
||||
|
||||
# else /* IO_APIC || PARAVIRT */
|
||||
#else /* IO_APIC || VOYAGER */
|
||||
|
||||
# define NR_IRQS 16
|
||||
|
||||
#endif
|
||||
|
||||
#else /* !VISWS && !VOYAGER */
|
||||
|
||||
# define NR_IRQS 224
|
||||
|
||||
#endif /* VISWS */
|
||||
|
||||
/* Voyager specific defines */
|
||||
/* These define the CPIs we use in linux */
|
||||
#define VIC_CPI_LEVEL0 0
|
||||
|
|
|
@ -154,7 +154,7 @@ extern unsigned long node_remap_size[];
|
|||
|
||||
#endif
|
||||
|
||||
/* sched_domains SD_NODE_INIT for NUMAQ machines */
|
||||
/* sched_domains SD_NODE_INIT for NUMA machines */
|
||||
#define SD_NODE_INIT (struct sched_domain) { \
|
||||
.min_interval = 8, \
|
||||
.max_interval = 32, \
|
||||
|
@ -169,8 +169,9 @@ extern unsigned long node_remap_size[];
|
|||
.flags = SD_LOAD_BALANCE \
|
||||
| SD_BALANCE_EXEC \
|
||||
| SD_BALANCE_FORK \
|
||||
| SD_SERIALIZE \
|
||||
| SD_WAKE_BALANCE, \
|
||||
| SD_WAKE_AFFINE \
|
||||
| SD_WAKE_BALANCE \
|
||||
| SD_SERIALIZE, \
|
||||
.last_balance = jiffies, \
|
||||
.balance_interval = 1, \
|
||||
}
|
||||
|
|
|
@ -520,6 +520,7 @@ extern void voyager_restart(void);
|
|||
extern void voyager_cat_power_off(void);
|
||||
extern void voyager_cat_do_common_interrupt(void);
|
||||
extern void voyager_handle_nmi(void);
|
||||
extern void voyager_smp_intr_init(void);
|
||||
/* Commands for the following are */
|
||||
#define VOYAGER_PSI_READ 0
|
||||
#define VOYAGER_PSI_WRITE 1
|
||||
|
|
|
@ -50,7 +50,7 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
|
|||
/* returns !0 if the IOMMU is caching non-present entries in its TLB */
|
||||
static int iommu_has_npcache(struct amd_iommu *iommu)
|
||||
{
|
||||
return iommu->cap & IOMMU_CAP_NPCACHE;
|
||||
return iommu->cap & (1UL << IOMMU_CAP_NPCACHE);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -536,6 +536,9 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom,
|
|||
{
|
||||
address >>= PAGE_SHIFT;
|
||||
iommu_area_free(dom->bitmap, address, pages);
|
||||
|
||||
if (address + pages >= dom->next_bit)
|
||||
dom->need_flush = true;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -992,8 +995,10 @@ static void __unmap_single(struct amd_iommu *iommu,
|
|||
|
||||
dma_ops_free_addresses(dma_dom, dma_addr, pages);
|
||||
|
||||
if (amd_iommu_unmap_flush)
|
||||
if (amd_iommu_unmap_flush || dma_dom->need_flush) {
|
||||
iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size);
|
||||
dma_dom->need_flush = false;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -3611,6 +3611,8 @@ int __init probe_nr_irqs(void)
|
|||
/* something wrong ? */
|
||||
if (nr < nr_min)
|
||||
nr = nr_min;
|
||||
if (WARN_ON(nr > NR_IRQS))
|
||||
nr = NR_IRQS;
|
||||
|
||||
return nr;
|
||||
}
|
||||
|
|
|
@ -29,11 +29,7 @@ EXPORT_SYMBOL(pm_power_off);
|
|||
|
||||
static const struct desc_ptr no_idt = {};
|
||||
static int reboot_mode;
|
||||
/*
|
||||
* Keyboard reset and triple fault may result in INIT, not RESET, which
|
||||
* doesn't work when we're in vmx root mode. Try ACPI first.
|
||||
*/
|
||||
enum reboot_type reboot_type = BOOT_ACPI;
|
||||
enum reboot_type reboot_type = BOOT_KBD;
|
||||
int reboot_force;
|
||||
|
||||
#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
|
||||
|
|
|
@ -154,6 +154,12 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
|
|||
flush_mm = mm;
|
||||
flush_va = va;
|
||||
cpus_or(flush_cpumask, cpumask, flush_cpumask);
|
||||
|
||||
/*
|
||||
* Make the above memory operations globally visible before
|
||||
* sending the IPI.
|
||||
*/
|
||||
smp_mb();
|
||||
/*
|
||||
* We have to send the IPI only to
|
||||
* CPUs affected.
|
||||
|
|
|
@ -182,6 +182,11 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
|
|||
f->flush_va = va;
|
||||
cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask);
|
||||
|
||||
/*
|
||||
* Make the above memory operations globally visible before
|
||||
* sending the IPI.
|
||||
*/
|
||||
smp_mb();
|
||||
/*
|
||||
* We have to send the IPI only to
|
||||
* CPUs affected.
|
||||
|
|
|
@ -813,10 +813,6 @@ void __init tsc_init(void)
|
|||
cpu_khz = calibrate_cpu();
|
||||
#endif
|
||||
|
||||
lpj = ((u64)tsc_khz * 1000);
|
||||
do_div(lpj, HZ);
|
||||
lpj_fine = lpj;
|
||||
|
||||
printk("Detected %lu.%03lu MHz processor.\n",
|
||||
(unsigned long)cpu_khz / 1000,
|
||||
(unsigned long)cpu_khz % 1000);
|
||||
|
@ -836,6 +832,10 @@ void __init tsc_init(void)
|
|||
/* now allow native_sched_clock() to use rdtsc */
|
||||
tsc_disabled = 0;
|
||||
|
||||
lpj = ((u64)tsc_khz * 1000);
|
||||
do_div(lpj, HZ);
|
||||
lpj_fine = lpj;
|
||||
|
||||
use_tsc_delay();
|
||||
/* Check and install the TSC clocksource */
|
||||
dmi_check_system(bad_tsc_dmi_table);
|
||||
|
|
|
@ -27,7 +27,7 @@ static struct irqaction irq2 = {
|
|||
void __init intr_init_hook(void)
|
||||
{
|
||||
#ifdef CONFIG_SMP
|
||||
smp_intr_init();
|
||||
voyager_smp_intr_init();
|
||||
#endif
|
||||
|
||||
setup_irq(2, &irq2);
|
||||
|
|
|
@ -1258,7 +1258,7 @@ static void handle_vic_irq(unsigned int irq, struct irq_desc *desc)
|
|||
#define QIC_SET_GATE(cpi, vector) \
|
||||
set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector))
|
||||
|
||||
void __init smp_intr_init(void)
|
||||
void __init voyager_smp_intr_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
obj-y := init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \
|
||||
pat.o pgtable.o gup.o
|
||||
|
||||
obj-$(CONFIG_X86_32) += pgtable_32.o
|
||||
obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o
|
||||
|
||||
obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
|
||||
obj-$(CONFIG_X86_PTDUMP) += dump_pagetables.o
|
||||
|
|
|
@ -334,7 +334,6 @@ int devmem_is_allowed(unsigned long pagenr)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
pte_t *kmap_pte;
|
||||
pgprot_t kmap_prot;
|
||||
|
||||
|
@ -357,6 +356,7 @@ static void __init kmap_init(void)
|
|||
kmap_prot = PAGE_KERNEL;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
static void __init permanent_kmaps_init(pgd_t *pgd_base)
|
||||
{
|
||||
unsigned long vaddr;
|
||||
|
@ -436,7 +436,6 @@ static void __init set_highmem_pages_init(void)
|
|||
#endif /* !CONFIG_NUMA */
|
||||
|
||||
#else
|
||||
# define kmap_init() do { } while (0)
|
||||
# define permanent_kmaps_init(pgd_base) do { } while (0)
|
||||
# define set_highmem_pages_init() do { } while (0)
|
||||
#endif /* CONFIG_HIGHMEM */
|
||||
|
|
59
arch/x86/mm/iomap_32.c
Normal file
59
arch/x86/mm/iomap_32.c
Normal file
|
@ -0,0 +1,59 @@
|
|||
/*
|
||||
* Copyright © 2008 Ingo Molnar
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
||||
*/
|
||||
|
||||
#include <asm/iomap.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
/* Map 'pfn' using fixed map 'type' and protections 'prot'
|
||||
*/
|
||||
void *
|
||||
iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
|
||||
{
|
||||
enum fixed_addresses idx;
|
||||
unsigned long vaddr;
|
||||
|
||||
pagefault_disable();
|
||||
|
||||
idx = type + KM_TYPE_NR*smp_processor_id();
|
||||
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
|
||||
set_pte(kmap_pte-idx, pfn_pte(pfn, prot));
|
||||
arch_flush_lazy_mmu_mode();
|
||||
|
||||
return (void*) vaddr;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn);
|
||||
|
||||
void
|
||||
iounmap_atomic(void *kvaddr, enum km_type type)
|
||||
{
|
||||
unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
|
||||
enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
|
||||
|
||||
/*
|
||||
* Force other mappings to Oops if they'll try to access this pte
|
||||
* without first remap it. Keeping stale mappings around is a bad idea
|
||||
* also, in case the page changes cacheability attributes or becomes
|
||||
* a protected page in a hypervisor.
|
||||
*/
|
||||
if (vaddr == __fix_to_virt(FIX_KMAP_BEGIN+idx))
|
||||
kpte_clear_flush(kmap_pte-idx, vaddr);
|
||||
|
||||
arch_flush_lazy_mmu_mode();
|
||||
pagefault_enable();
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(iounmap_atomic);
|
|
@ -1770,8 +1770,6 @@ static void end_that_request_last(struct request *req, int error)
|
|||
{
|
||||
struct gendisk *disk = req->rq_disk;
|
||||
|
||||
blk_delete_timer(req);
|
||||
|
||||
if (blk_rq_tagged(req))
|
||||
blk_queue_end_tag(req->q, req);
|
||||
|
||||
|
@ -1781,6 +1779,8 @@ static void end_that_request_last(struct request *req, int error)
|
|||
if (unlikely(laptop_mode) && blk_fs_request(req))
|
||||
laptop_io_completion();
|
||||
|
||||
blk_delete_timer(req);
|
||||
|
||||
/*
|
||||
* Account IO completion. bar_rq isn't accounted as a normal
|
||||
* IO on queueing nor completion. Accounting the containing
|
||||
|
|
|
@ -222,27 +222,6 @@ int blk_rq_map_sg(struct request_queue *q, struct request *rq,
|
|||
}
|
||||
EXPORT_SYMBOL(blk_rq_map_sg);
|
||||
|
||||
static inline int ll_new_mergeable(struct request_queue *q,
|
||||
struct request *req,
|
||||
struct bio *bio)
|
||||
{
|
||||
int nr_phys_segs = bio_phys_segments(q, bio);
|
||||
|
||||
if (req->nr_phys_segments + nr_phys_segs > q->max_phys_segments) {
|
||||
req->cmd_flags |= REQ_NOMERGE;
|
||||
if (req == q->last_merge)
|
||||
q->last_merge = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* A hw segment is just getting larger, bump just the phys
|
||||
* counter.
|
||||
*/
|
||||
req->nr_phys_segments += nr_phys_segs;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static inline int ll_new_hw_segment(struct request_queue *q,
|
||||
struct request *req,
|
||||
struct bio *bio)
|
||||
|
|
|
@ -75,14 +75,7 @@ void blk_delete_timer(struct request *req)
|
|||
{
|
||||
struct request_queue *q = req->q;
|
||||
|
||||
/*
|
||||
* Nothing to detach
|
||||
*/
|
||||
if (!q->rq_timed_out_fn || !req->deadline)
|
||||
return;
|
||||
|
||||
list_del_init(&req->timeout_list);
|
||||
|
||||
if (list_empty(&q->timeout_list))
|
||||
del_timer(&q->timeout);
|
||||
}
|
||||
|
@ -142,7 +135,7 @@ void blk_rq_timed_out_timer(unsigned long data)
|
|||
}
|
||||
|
||||
if (next_set && !list_empty(&q->timeout_list))
|
||||
mod_timer(&q->timeout, round_jiffies(next));
|
||||
mod_timer(&q->timeout, round_jiffies_up(next));
|
||||
|
||||
spin_unlock_irqrestore(q->queue_lock, flags);
|
||||
}
|
||||
|
@ -198,17 +191,10 @@ void blk_add_timer(struct request *req)
|
|||
|
||||
/*
|
||||
* If the timer isn't already pending or this timeout is earlier
|
||||
* than an existing one, modify the timer. Round to next nearest
|
||||
* than an existing one, modify the timer. Round up to next nearest
|
||||
* second.
|
||||
*/
|
||||
expiry = round_jiffies(req->deadline);
|
||||
|
||||
/*
|
||||
* We use ->deadline == 0 to detect whether a timer was added or
|
||||
* not, so just increase to next jiffy for that specific case
|
||||
*/
|
||||
if (unlikely(!req->deadline))
|
||||
req->deadline = 1;
|
||||
expiry = round_jiffies_up(req->deadline);
|
||||
|
||||
if (!timer_pending(&q->timeout) ||
|
||||
time_before(expiry, q->timeout.expires))
|
||||
|
|
|
@ -773,12 +773,6 @@ struct request *elv_next_request(struct request_queue *q)
|
|||
*/
|
||||
rq->cmd_flags |= REQ_STARTED;
|
||||
blk_add_trace_rq(q, rq, BLK_TA_ISSUE);
|
||||
|
||||
/*
|
||||
* We are now handing the request to the hardware,
|
||||
* add the timeout handler
|
||||
*/
|
||||
blk_add_timer(rq);
|
||||
}
|
||||
|
||||
if (!q->boundary_rq || q->boundary_rq == rq) {
|
||||
|
@ -850,6 +844,12 @@ void elv_dequeue_request(struct request_queue *q, struct request *rq)
|
|||
*/
|
||||
if (blk_account_rq(rq))
|
||||
q->in_flight++;
|
||||
|
||||
/*
|
||||
* We are now handing the request to the hardware, add the
|
||||
* timeout handler.
|
||||
*/
|
||||
blk_add_timer(rq);
|
||||
}
|
||||
EXPORT_SYMBOL(elv_dequeue_request);
|
||||
|
||||
|
|
|
@ -4024,6 +4024,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
|||
|
||||
/* Weird ATAPI devices */
|
||||
{ "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
|
||||
{ "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
|
||||
|
||||
/* Devices we expect to fail diagnostics */
|
||||
|
||||
|
@ -4444,7 +4445,8 @@ int atapi_check_dma(struct ata_queued_cmd *qc)
|
|||
/* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
|
||||
* few ATAPI devices choke on such DMA requests.
|
||||
*/
|
||||
if (unlikely(qc->nbytes & 15))
|
||||
if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) &&
|
||||
unlikely(qc->nbytes & 15))
|
||||
return 1;
|
||||
|
||||
if (ap->ops->check_atapi_dma)
|
||||
|
@ -5934,7 +5936,7 @@ static void ata_port_detach(struct ata_port *ap)
|
|||
* to us. Restore SControl and disable all existing devices.
|
||||
*/
|
||||
__ata_port_for_each_link(link, ap) {
|
||||
sata_scr_write(link, SCR_CONTROL, link->saved_scontrol);
|
||||
sata_scr_write(link, SCR_CONTROL, link->saved_scontrol & 0xff0);
|
||||
ata_link_for_each_dev(dev, link)
|
||||
ata_dev_disable(dev);
|
||||
}
|
||||
|
|
|
@ -190,7 +190,7 @@ static ssize_t ata_scsi_park_show(struct device *device,
|
|||
struct ata_port *ap;
|
||||
struct ata_link *link;
|
||||
struct ata_device *dev;
|
||||
unsigned long flags;
|
||||
unsigned long flags, now;
|
||||
unsigned int uninitialized_var(msecs);
|
||||
int rc = 0;
|
||||
|
||||
|
@ -208,10 +208,11 @@ static ssize_t ata_scsi_park_show(struct device *device,
|
|||
}
|
||||
|
||||
link = dev->link;
|
||||
now = jiffies;
|
||||
if (ap->pflags & ATA_PFLAG_EH_IN_PROGRESS &&
|
||||
link->eh_context.unloaded_mask & (1 << dev->devno) &&
|
||||
time_after(dev->unpark_deadline, jiffies))
|
||||
msecs = jiffies_to_msecs(dev->unpark_deadline - jiffies);
|
||||
time_after(dev->unpark_deadline, now))
|
||||
msecs = jiffies_to_msecs(dev->unpark_deadline - now);
|
||||
else
|
||||
msecs = 0;
|
||||
|
||||
|
|
|
@ -307,10 +307,10 @@ static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
|
|||
|
||||
static void nv_nf2_freeze(struct ata_port *ap);
|
||||
static void nv_nf2_thaw(struct ata_port *ap);
|
||||
static int nv_nf2_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline);
|
||||
static void nv_ck804_freeze(struct ata_port *ap);
|
||||
static void nv_ck804_thaw(struct ata_port *ap);
|
||||
static int nv_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline);
|
||||
static int nv_adma_slave_config(struct scsi_device *sdev);
|
||||
static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc);
|
||||
static void nv_adma_qc_prep(struct ata_queued_cmd *qc);
|
||||
|
@ -405,17 +405,8 @@ static struct scsi_host_template nv_swncq_sht = {
|
|||
.slave_configure = nv_swncq_slave_config,
|
||||
};
|
||||
|
||||
/* OSDL bz3352 reports that some nv controllers can't determine device
|
||||
* signature reliably and nv_hardreset is implemented to work around
|
||||
* the problem. This was reported on nf3 and it's unclear whether any
|
||||
* other controllers are affected. However, the workaround has been
|
||||
* applied to all variants and there isn't much to gain by trying to
|
||||
* find out exactly which ones are affected at this point especially
|
||||
* because NV has moved over to ahci for newer controllers.
|
||||
*/
|
||||
static struct ata_port_operations nv_common_ops = {
|
||||
.inherits = &ata_bmdma_port_ops,
|
||||
.hardreset = nv_hardreset,
|
||||
.scr_read = nv_scr_read,
|
||||
.scr_write = nv_scr_write,
|
||||
};
|
||||
|
@ -429,12 +420,22 @@ static struct ata_port_operations nv_generic_ops = {
|
|||
.hardreset = ATA_OP_NULL,
|
||||
};
|
||||
|
||||
/* OSDL bz3352 reports that nf2/3 controllers can't determine device
|
||||
* signature reliably. Also, the following thread reports detection
|
||||
* failure on cold boot with the standard debouncing timing.
|
||||
*
|
||||
* http://thread.gmane.org/gmane.linux.ide/34098
|
||||
*
|
||||
* Debounce with hotplug timing and request follow-up SRST.
|
||||
*/
|
||||
static struct ata_port_operations nv_nf2_ops = {
|
||||
.inherits = &nv_common_ops,
|
||||
.freeze = nv_nf2_freeze,
|
||||
.thaw = nv_nf2_thaw,
|
||||
.hardreset = nv_nf2_hardreset,
|
||||
};
|
||||
|
||||
/* CK804 finally gets hardreset right */
|
||||
static struct ata_port_operations nv_ck804_ops = {
|
||||
.inherits = &nv_common_ops,
|
||||
.freeze = nv_ck804_freeze,
|
||||
|
@ -443,7 +444,7 @@ static struct ata_port_operations nv_ck804_ops = {
|
|||
};
|
||||
|
||||
static struct ata_port_operations nv_adma_ops = {
|
||||
.inherits = &nv_common_ops,
|
||||
.inherits = &nv_ck804_ops,
|
||||
|
||||
.check_atapi_dma = nv_adma_check_atapi_dma,
|
||||
.sff_tf_read = nv_adma_tf_read,
|
||||
|
@ -467,7 +468,7 @@ static struct ata_port_operations nv_adma_ops = {
|
|||
};
|
||||
|
||||
static struct ata_port_operations nv_swncq_ops = {
|
||||
.inherits = &nv_common_ops,
|
||||
.inherits = &nv_generic_ops,
|
||||
|
||||
.qc_defer = ata_std_qc_defer,
|
||||
.qc_prep = nv_swncq_qc_prep,
|
||||
|
@ -1553,6 +1554,17 @@ static void nv_nf2_thaw(struct ata_port *ap)
|
|||
iowrite8(mask, scr_addr + NV_INT_ENABLE);
|
||||
}
|
||||
|
||||
static int nv_nf2_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline)
|
||||
{
|
||||
bool online;
|
||||
int rc;
|
||||
|
||||
rc = sata_link_hardreset(link, sata_deb_timing_hotplug, deadline,
|
||||
&online, NULL);
|
||||
return online ? -EAGAIN : rc;
|
||||
}
|
||||
|
||||
static void nv_ck804_freeze(struct ata_port *ap)
|
||||
{
|
||||
void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR];
|
||||
|
@ -1605,21 +1617,6 @@ static void nv_mcp55_thaw(struct ata_port *ap)
|
|||
ata_sff_thaw(ap);
|
||||
}
|
||||
|
||||
static int nv_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline)
|
||||
{
|
||||
int rc;
|
||||
|
||||
/* SATA hardreset fails to retrieve proper device signature on
|
||||
* some controllers. Request follow up SRST. For more info,
|
||||
* see http://bugzilla.kernel.org/show_bug.cgi?id=3352
|
||||
*/
|
||||
rc = sata_sff_hardreset(link, class, deadline);
|
||||
if (rc)
|
||||
return rc;
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
static void nv_adma_error_handler(struct ata_port *ap)
|
||||
{
|
||||
struct nv_adma_port_priv *pp = ap->private_data;
|
||||
|
|
|
@ -153,6 +153,10 @@ static void pdc_freeze(struct ata_port *ap);
|
|||
static void pdc_sata_freeze(struct ata_port *ap);
|
||||
static void pdc_thaw(struct ata_port *ap);
|
||||
static void pdc_sata_thaw(struct ata_port *ap);
|
||||
static int pdc_pata_softreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline);
|
||||
static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline);
|
||||
static void pdc_error_handler(struct ata_port *ap);
|
||||
static void pdc_post_internal_cmd(struct ata_queued_cmd *qc);
|
||||
static int pdc_pata_cable_detect(struct ata_port *ap);
|
||||
|
@ -186,6 +190,7 @@ static struct ata_port_operations pdc_sata_ops = {
|
|||
.scr_read = pdc_sata_scr_read,
|
||||
.scr_write = pdc_sata_scr_write,
|
||||
.port_start = pdc_sata_port_start,
|
||||
.hardreset = pdc_sata_hardreset,
|
||||
};
|
||||
|
||||
/* First-generation chips need a more restrictive ->check_atapi_dma op */
|
||||
|
@ -200,6 +205,7 @@ static struct ata_port_operations pdc_pata_ops = {
|
|||
.freeze = pdc_freeze,
|
||||
.thaw = pdc_thaw,
|
||||
.port_start = pdc_common_port_start,
|
||||
.softreset = pdc_pata_softreset,
|
||||
};
|
||||
|
||||
static const struct ata_port_info pdc_port_info[] = {
|
||||
|
@ -693,6 +699,20 @@ static void pdc_sata_thaw(struct ata_port *ap)
|
|||
readl(host_mmio + hotplug_offset); /* flush */
|
||||
}
|
||||
|
||||
static int pdc_pata_softreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline)
|
||||
{
|
||||
pdc_reset_port(link->ap);
|
||||
return ata_sff_softreset(link, class, deadline);
|
||||
}
|
||||
|
||||
static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline)
|
||||
{
|
||||
pdc_reset_port(link->ap);
|
||||
return sata_sff_hardreset(link, class, deadline);
|
||||
}
|
||||
|
||||
static void pdc_error_handler(struct ata_port *ap)
|
||||
{
|
||||
if (!(ap->pflags & ATA_PFLAG_FROZEN))
|
||||
|
|
|
@ -602,8 +602,10 @@ static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
rc = vt8251_prepare_host(pdev, &host);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
rc = -EINVAL;
|
||||
}
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
svia_configure(pdev);
|
||||
|
||||
|
|
|
@ -96,6 +96,8 @@ static const struct pci_device_id cciss_pci_device_id[] = {
|
|||
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
|
||||
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
|
||||
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
|
||||
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
|
||||
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
|
||||
{PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
|
||||
PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
|
||||
{0,}
|
||||
|
@ -133,6 +135,8 @@ static struct board_type products[] = {
|
|||
{0x3245103C, "Smart Array P410i", &SA5_access},
|
||||
{0x3247103C, "Smart Array P411", &SA5_access},
|
||||
{0x3249103C, "Smart Array P812", &SA5_access},
|
||||
{0x324A103C, "Smart Array P712m", &SA5_access},
|
||||
{0x324B103C, "Smart Array P711m", &SA5_access},
|
||||
{0xFFFF103C, "Unknown Smart Array", &SA5_access},
|
||||
};
|
||||
|
||||
|
@ -1366,6 +1370,7 @@ static void cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
|
|||
disk->first_minor = drv_index << NWD_SHIFT;
|
||||
disk->fops = &cciss_fops;
|
||||
disk->private_data = &h->drv[drv_index];
|
||||
disk->driverfs_dev = &h->pdev->dev;
|
||||
|
||||
/* Set up queue information */
|
||||
blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
|
||||
|
@ -3404,7 +3409,8 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
|
|||
int i;
|
||||
int j = 0;
|
||||
int rc;
|
||||
int dac;
|
||||
int dac, return_code;
|
||||
InquiryData_struct *inq_buff = NULL;
|
||||
|
||||
i = alloc_cciss_hba();
|
||||
if (i < 0)
|
||||
|
@ -3510,6 +3516,25 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
|
|||
/* Turn the interrupts on so we can service requests */
|
||||
hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_ON);
|
||||
|
||||
/* Get the firmware version */
|
||||
inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
|
||||
if (inq_buff == NULL) {
|
||||
printk(KERN_ERR "cciss: out of memory\n");
|
||||
goto clean4;
|
||||
}
|
||||
|
||||
return_code = sendcmd_withirq(CISS_INQUIRY, i, inq_buff,
|
||||
sizeof(InquiryData_struct), 0, 0 , 0, TYPE_CMD);
|
||||
if (return_code == IO_OK) {
|
||||
hba[i]->firm_ver[0] = inq_buff->data_byte[32];
|
||||
hba[i]->firm_ver[1] = inq_buff->data_byte[33];
|
||||
hba[i]->firm_ver[2] = inq_buff->data_byte[34];
|
||||
hba[i]->firm_ver[3] = inq_buff->data_byte[35];
|
||||
} else { /* send command failed */
|
||||
printk(KERN_WARNING "cciss: unable to determine firmware"
|
||||
" version of controller\n");
|
||||
}
|
||||
|
||||
cciss_procinit(i);
|
||||
|
||||
hba[i]->cciss_max_sectors = 2048;
|
||||
|
@ -3520,6 +3545,7 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
|
|||
return 1;
|
||||
|
||||
clean4:
|
||||
kfree(inq_buff);
|
||||
#ifdef CONFIG_CISS_SCSI_TAPE
|
||||
kfree(hba[i]->scsi_rejects.complete);
|
||||
#endif
|
||||
|
|
|
@ -567,7 +567,12 @@ static int __init cpqarray_init(void)
|
|||
num_cntlrs_reg++;
|
||||
}
|
||||
|
||||
return(num_cntlrs_reg);
|
||||
if (num_cntlrs_reg)
|
||||
return 0;
|
||||
else {
|
||||
pci_unregister_driver(&cpqarray_pci_driver);
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
||||
/* Function to find the first free pointer into our hba[] array */
|
||||
|
|
|
@ -1644,7 +1644,10 @@ static void reset_terminal(struct vc_data *vc, int do_clear)
|
|||
vc->vc_tab_stop[1] =
|
||||
vc->vc_tab_stop[2] =
|
||||
vc->vc_tab_stop[3] =
|
||||
vc->vc_tab_stop[4] = 0x01010101;
|
||||
vc->vc_tab_stop[4] =
|
||||
vc->vc_tab_stop[5] =
|
||||
vc->vc_tab_stop[6] =
|
||||
vc->vc_tab_stop[7] = 0x01010101;
|
||||
|
||||
vc->vc_bell_pitch = DEFAULT_BELL_PITCH;
|
||||
vc->vc_bell_duration = DEFAULT_BELL_DURATION;
|
||||
|
@ -1935,7 +1938,10 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c)
|
|||
vc->vc_tab_stop[1] =
|
||||
vc->vc_tab_stop[2] =
|
||||
vc->vc_tab_stop[3] =
|
||||
vc->vc_tab_stop[4] = 0;
|
||||
vc->vc_tab_stop[4] =
|
||||
vc->vc_tab_stop[5] =
|
||||
vc->vc_tab_stop[6] =
|
||||
vc->vc_tab_stop[7] = 0;
|
||||
}
|
||||
return;
|
||||
case 'm':
|
||||
|
|
|
@ -587,8 +587,7 @@ static void create_units(struct fw_device *device)
|
|||
unit->device.bus = &fw_bus_type;
|
||||
unit->device.type = &fw_unit_type;
|
||||
unit->device.parent = &device->device;
|
||||
snprintf(unit->device.bus_id, sizeof(unit->device.bus_id),
|
||||
"%s.%d", device->device.bus_id, i++);
|
||||
dev_set_name(&unit->device, "%s.%d", dev_name(&device->device), i++);
|
||||
|
||||
init_fw_attribute_group(&unit->device,
|
||||
fw_unit_attributes,
|
||||
|
@ -711,8 +710,7 @@ static void fw_device_init(struct work_struct *work)
|
|||
device->device.type = &fw_device_type;
|
||||
device->device.parent = device->card->device;
|
||||
device->device.devt = MKDEV(fw_cdev_major, minor);
|
||||
snprintf(device->device.bus_id, sizeof(device->device.bus_id),
|
||||
"fw%d", minor);
|
||||
dev_set_name(&device->device, "fw%d", minor);
|
||||
|
||||
init_fw_attribute_group(&device->device,
|
||||
fw_device_attributes,
|
||||
|
@ -741,13 +739,13 @@ static void fw_device_init(struct work_struct *work)
|
|||
if (device->config_rom_retries)
|
||||
fw_notify("created device %s: GUID %08x%08x, S%d00, "
|
||||
"%d config ROM retries\n",
|
||||
device->device.bus_id,
|
||||
dev_name(&device->device),
|
||||
device->config_rom[3], device->config_rom[4],
|
||||
1 << device->max_speed,
|
||||
device->config_rom_retries);
|
||||
else
|
||||
fw_notify("created device %s: GUID %08x%08x, S%d00\n",
|
||||
device->device.bus_id,
|
||||
dev_name(&device->device),
|
||||
device->config_rom[3], device->config_rom[4],
|
||||
1 << device->max_speed);
|
||||
device->config_rom_retries = 0;
|
||||
|
@ -883,12 +881,12 @@ static void fw_device_refresh(struct work_struct *work)
|
|||
FW_DEVICE_RUNNING) == FW_DEVICE_SHUTDOWN)
|
||||
goto gone;
|
||||
|
||||
fw_notify("refreshed device %s\n", device->device.bus_id);
|
||||
fw_notify("refreshed device %s\n", dev_name(&device->device));
|
||||
device->config_rom_retries = 0;
|
||||
goto out;
|
||||
|
||||
give_up:
|
||||
fw_notify("giving up on refresh of device %s\n", device->device.bus_id);
|
||||
fw_notify("giving up on refresh of device %s\n", dev_name(&device->device));
|
||||
gone:
|
||||
atomic_set(&device->state, FW_DEVICE_SHUTDOWN);
|
||||
fw_device_shutdown(work);
|
||||
|
|
|
@ -2468,7 +2468,7 @@ pci_probe(struct pci_dev *dev, const struct pci_device_id *ent)
|
|||
goto fail_self_id;
|
||||
|
||||
fw_notify("Added fw-ohci device %s, OHCI version %x.%x\n",
|
||||
dev->dev.bus_id, version >> 16, version & 0xff);
|
||||
dev_name(&dev->dev), version >> 16, version & 0xff);
|
||||
return 0;
|
||||
|
||||
fail_self_id:
|
||||
|
|
|
@ -1135,7 +1135,7 @@ static int sbp2_probe(struct device *dev)
|
|||
tgt->unit = unit;
|
||||
kref_init(&tgt->kref);
|
||||
INIT_LIST_HEAD(&tgt->lu_list);
|
||||
tgt->bus_id = unit->device.bus_id;
|
||||
tgt->bus_id = dev_name(&unit->device);
|
||||
tgt->guid = (u64)device->config_rom[3] << 32 | device->config_rom[4];
|
||||
|
||||
if (fw_device_enable_phys_dma(device) < 0)
|
||||
|
|
|
@ -3,13 +3,14 @@
|
|||
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
|
||||
|
||||
ccflags-y := -Iinclude/drm
|
||||
i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_opregion.o \
|
||||
i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
|
||||
i915_suspend.o \
|
||||
i915_gem.o \
|
||||
i915_gem_debug.o \
|
||||
i915_gem_proc.o \
|
||||
i915_gem_tiling.o
|
||||
|
||||
i915-$(CONFIG_ACPI) += i915_opregion.o
|
||||
i915-$(CONFIG_COMPAT) += i915_ioc32.o
|
||||
|
||||
obj-$(CONFIG_DRM_I915) += i915.o
|
||||
|
|
|
@ -960,6 +960,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
|
|||
DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0),
|
||||
DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0),
|
||||
DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
|
||||
DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0),
|
||||
};
|
||||
|
||||
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
|
||||
|
|
|
@ -31,6 +31,7 @@
|
|||
#define _I915_DRV_H_
|
||||
|
||||
#include "i915_reg.h"
|
||||
#include <linux/io-mapping.h>
|
||||
|
||||
/* General customization:
|
||||
*/
|
||||
|
@ -246,6 +247,8 @@ typedef struct drm_i915_private {
|
|||
struct {
|
||||
struct drm_mm gtt_space;
|
||||
|
||||
struct io_mapping *gtt_mapping;
|
||||
|
||||
/**
|
||||
* List of objects currently involved in rendering from the
|
||||
* ringbuffer.
|
||||
|
@ -502,6 +505,8 @@ int i915_gem_set_tiling(struct drm_device *dev, void *data,
|
|||
struct drm_file *file_priv);
|
||||
int i915_gem_get_tiling(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv);
|
||||
int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv);
|
||||
void i915_gem_load(struct drm_device *dev);
|
||||
int i915_gem_proc_init(struct drm_minor *minor);
|
||||
void i915_gem_proc_cleanup(struct drm_minor *minor);
|
||||
|
@ -539,11 +544,18 @@ extern int i915_restore_state(struct drm_device *dev);
|
|||
extern int i915_save_state(struct drm_device *dev);
|
||||
extern int i915_restore_state(struct drm_device *dev);
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
/* i915_opregion.c */
|
||||
extern int intel_opregion_init(struct drm_device *dev);
|
||||
extern void intel_opregion_free(struct drm_device *dev);
|
||||
extern void opregion_asle_intr(struct drm_device *dev);
|
||||
extern void opregion_enable_asle(struct drm_device *dev);
|
||||
#else
|
||||
static inline int intel_opregion_init(struct drm_device *dev) { return 0; }
|
||||
static inline void intel_opregion_free(struct drm_device *dev) { return; }
|
||||
static inline void opregion_asle_intr(struct drm_device *dev) { return; }
|
||||
static inline void opregion_enable_asle(struct drm_device *dev) { return; }
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Lock test for when it's just for synchronization of ring access.
|
||||
|
|
|
@ -79,6 +79,28 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data,
|
|||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
struct drm_i915_gem_get_aperture *args = data;
|
||||
struct drm_i915_gem_object *obj_priv;
|
||||
|
||||
if (!(dev->driver->driver_features & DRIVER_GEM))
|
||||
return -ENODEV;
|
||||
|
||||
args->aper_size = dev->gtt_total;
|
||||
args->aper_available_size = args->aper_size;
|
||||
|
||||
list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
|
||||
if (obj_priv->pin_count > 0)
|
||||
args->aper_available_size -= obj_priv->obj->size;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Creates a new mm object and returns a handle to it.
|
||||
|
@ -171,35 +193,50 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Try to write quickly with an atomic kmap. Return true on success.
|
||||
*
|
||||
* If this fails (which includes a partial write), we'll redo the whole
|
||||
* thing with the slow version.
|
||||
*
|
||||
* This is a workaround for the low performance of iounmap (approximate
|
||||
* 10% cpu cost on normal 3D workloads). kmap_atomic on HIGHMEM kernels
|
||||
* happens to let us map card memory without taking IPIs. When the vmap
|
||||
* rework lands we should be able to dump this hack.
|
||||
/* This is the fast write path which cannot handle
|
||||
* page faults in the source data
|
||||
*/
|
||||
static inline int fast_user_write(unsigned long pfn, char __user *user_data,
|
||||
int l, int o)
|
||||
{
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
unsigned long unwritten;
|
||||
char *vaddr_atomic;
|
||||
|
||||
vaddr_atomic = kmap_atomic_pfn(pfn, KM_USER0);
|
||||
#if WATCH_PWRITE
|
||||
DRM_INFO("pwrite i %d o %d l %d pfn %ld vaddr %p\n",
|
||||
i, o, l, pfn, vaddr_atomic);
|
||||
#endif
|
||||
unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + o, user_data, l);
|
||||
kunmap_atomic(vaddr_atomic, KM_USER0);
|
||||
return !unwritten;
|
||||
#else
|
||||
static inline int
|
||||
fast_user_write(struct io_mapping *mapping,
|
||||
loff_t page_base, int page_offset,
|
||||
char __user *user_data,
|
||||
int length)
|
||||
{
|
||||
char *vaddr_atomic;
|
||||
unsigned long unwritten;
|
||||
|
||||
vaddr_atomic = io_mapping_map_atomic_wc(mapping, page_base);
|
||||
unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset,
|
||||
user_data, length);
|
||||
io_mapping_unmap_atomic(vaddr_atomic);
|
||||
if (unwritten)
|
||||
return -EFAULT;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Here's the write path which can sleep for
|
||||
* page faults
|
||||
*/
|
||||
|
||||
static inline int
|
||||
slow_user_write(struct io_mapping *mapping,
|
||||
loff_t page_base, int page_offset,
|
||||
char __user *user_data,
|
||||
int length)
|
||||
{
|
||||
char __iomem *vaddr;
|
||||
unsigned long unwritten;
|
||||
|
||||
vaddr = io_mapping_map_wc(mapping, page_base);
|
||||
if (vaddr == NULL)
|
||||
return -EFAULT;
|
||||
unwritten = __copy_from_user(vaddr + page_offset,
|
||||
user_data, length);
|
||||
io_mapping_unmap(vaddr);
|
||||
if (unwritten)
|
||||
return -EFAULT;
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -208,10 +245,12 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
|
|||
struct drm_file *file_priv)
|
||||
{
|
||||
struct drm_i915_gem_object *obj_priv = obj->driver_private;
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
ssize_t remain;
|
||||
loff_t offset;
|
||||
loff_t offset, page_base;
|
||||
char __user *user_data;
|
||||
int ret = 0;
|
||||
int page_offset, page_length;
|
||||
int ret;
|
||||
|
||||
user_data = (char __user *) (uintptr_t) args->data_ptr;
|
||||
remain = args->size;
|
||||
|
@ -235,57 +274,37 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
|
|||
obj_priv->dirty = 1;
|
||||
|
||||
while (remain > 0) {
|
||||
unsigned long pfn;
|
||||
int i, o, l;
|
||||
|
||||
/* Operation in this page
|
||||
*
|
||||
* i = page number
|
||||
* o = offset within page
|
||||
* l = bytes to copy
|
||||
* page_base = page offset within aperture
|
||||
* page_offset = offset within page
|
||||
* page_length = bytes to copy for this page
|
||||
*/
|
||||
i = offset >> PAGE_SHIFT;
|
||||
o = offset & (PAGE_SIZE-1);
|
||||
l = remain;
|
||||
if ((o + l) > PAGE_SIZE)
|
||||
l = PAGE_SIZE - o;
|
||||
page_base = (offset & ~(PAGE_SIZE-1));
|
||||
page_offset = offset & (PAGE_SIZE-1);
|
||||
page_length = remain;
|
||||
if ((page_offset + remain) > PAGE_SIZE)
|
||||
page_length = PAGE_SIZE - page_offset;
|
||||
|
||||
pfn = (dev->agp->base >> PAGE_SHIFT) + i;
|
||||
ret = fast_user_write (dev_priv->mm.gtt_mapping, page_base,
|
||||
page_offset, user_data, page_length);
|
||||
|
||||
if (!fast_user_write(pfn, user_data, l, o)) {
|
||||
unsigned long unwritten;
|
||||
char __iomem *vaddr;
|
||||
|
||||
vaddr = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE);
|
||||
#if WATCH_PWRITE
|
||||
DRM_INFO("pwrite slow i %d o %d l %d "
|
||||
"pfn %ld vaddr %p\n",
|
||||
i, o, l, pfn, vaddr);
|
||||
#endif
|
||||
if (vaddr == NULL) {
|
||||
ret = -EFAULT;
|
||||
/* If we get a fault while copying data, then (presumably) our
|
||||
* source page isn't available. In this case, use the
|
||||
* non-atomic function
|
||||
*/
|
||||
if (ret) {
|
||||
ret = slow_user_write (dev_priv->mm.gtt_mapping,
|
||||
page_base, page_offset,
|
||||
user_data, page_length);
|
||||
if (ret)
|
||||
goto fail;
|
||||
}
|
||||
unwritten = __copy_from_user(vaddr + o, user_data, l);
|
||||
#if WATCH_PWRITE
|
||||
DRM_INFO("unwritten %ld\n", unwritten);
|
||||
#endif
|
||||
iounmap(vaddr);
|
||||
if (unwritten) {
|
||||
ret = -EFAULT;
|
||||
goto fail;
|
||||
}
|
||||
}
|
||||
|
||||
remain -= l;
|
||||
user_data += l;
|
||||
offset += l;
|
||||
remain -= page_length;
|
||||
user_data += page_length;
|
||||
offset += page_length;
|
||||
}
|
||||
#if WATCH_PWRITE && 1
|
||||
i915_gem_clflush_object(obj);
|
||||
i915_gem_dump_object(obj, args->offset + args->size, __func__, ~0);
|
||||
i915_gem_clflush_object(obj);
|
||||
#endif
|
||||
|
||||
fail:
|
||||
i915_gem_object_unpin(obj);
|
||||
|
@ -1503,12 +1522,12 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
|
|||
struct drm_i915_gem_exec_object *entry)
|
||||
{
|
||||
struct drm_device *dev = obj->dev;
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
struct drm_i915_gem_relocation_entry reloc;
|
||||
struct drm_i915_gem_relocation_entry __user *relocs;
|
||||
struct drm_i915_gem_object *obj_priv = obj->driver_private;
|
||||
int i, ret;
|
||||
uint32_t last_reloc_offset = -1;
|
||||
void __iomem *reloc_page = NULL;
|
||||
void __iomem *reloc_page;
|
||||
|
||||
/* Choose the GTT offset for our buffer and put it there. */
|
||||
ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment);
|
||||
|
@ -1631,24 +1650,9 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
|
|||
* perform.
|
||||
*/
|
||||
reloc_offset = obj_priv->gtt_offset + reloc.offset;
|
||||
if (reloc_page == NULL ||
|
||||
(last_reloc_offset & ~(PAGE_SIZE - 1)) !=
|
||||
(reloc_offset & ~(PAGE_SIZE - 1))) {
|
||||
if (reloc_page != NULL)
|
||||
iounmap(reloc_page);
|
||||
|
||||
reloc_page = ioremap_wc(dev->agp->base +
|
||||
reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
|
||||
(reloc_offset &
|
||||
~(PAGE_SIZE - 1)),
|
||||
PAGE_SIZE);
|
||||
last_reloc_offset = reloc_offset;
|
||||
if (reloc_page == NULL) {
|
||||
drm_gem_object_unreference(target_obj);
|
||||
i915_gem_object_unpin(obj);
|
||||
return -ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
~(PAGE_SIZE - 1)));
|
||||
reloc_entry = (uint32_t __iomem *)(reloc_page +
|
||||
(reloc_offset & (PAGE_SIZE - 1)));
|
||||
reloc_val = target_obj_priv->gtt_offset + reloc.delta;
|
||||
|
@ -1659,6 +1663,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
|
|||
readl(reloc_entry), reloc_val);
|
||||
#endif
|
||||
writel(reloc_val, reloc_entry);
|
||||
io_mapping_unmap_atomic(reloc_page);
|
||||
|
||||
/* Write the updated presumed offset for this entry back out
|
||||
* to the user.
|
||||
|
@ -1674,9 +1679,6 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
|
|||
drm_gem_object_unreference(target_obj);
|
||||
}
|
||||
|
||||
if (reloc_page != NULL)
|
||||
iounmap(reloc_page);
|
||||
|
||||
#if WATCH_BUF
|
||||
if (0)
|
||||
i915_gem_dump_object(obj, 128, __func__, ~0);
|
||||
|
@ -2518,6 +2520,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
|
|||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
dev_priv->mm.gtt_mapping = io_mapping_create_wc(dev->agp->base,
|
||||
dev->agp->agp_info.aper_size
|
||||
* 1024 * 1024);
|
||||
|
||||
mutex_lock(&dev->struct_mutex);
|
||||
BUG_ON(!list_empty(&dev_priv->mm.active_list));
|
||||
BUG_ON(!list_empty(&dev_priv->mm.flushing_list));
|
||||
|
@ -2535,11 +2541,13 @@ int
|
|||
i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
int ret;
|
||||
|
||||
ret = i915_gem_idle(dev);
|
||||
drm_irq_uninstall(dev);
|
||||
|
||||
io_mapping_free(dev_priv->mm.gtt_mapping);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -653,15 +653,16 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
|
|||
RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
|
||||
|
||||
/* Turn on bus mastering */
|
||||
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
|
||||
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
|
||||
/* rs400, rs690/rs740 */
|
||||
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS;
|
||||
/* rs600/rs690/rs740 */
|
||||
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
|
||||
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
|
||||
} else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) {
|
||||
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
|
||||
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
|
||||
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
|
||||
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
|
||||
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
|
||||
} /* PCIE cards appears to not need this */
|
||||
|
|
|
@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
|
|||
* handling, not bus mastering itself.
|
||||
*/
|
||||
#define RADEON_BUS_CNTL 0x0030
|
||||
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
|
||||
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
|
||||
# define RADEON_BUS_MASTER_DIS (1 << 6)
|
||||
/* rs400, rs690/rs740 */
|
||||
# define RS400_BUS_MASTER_DIS (1 << 14)
|
||||
# define RS400_MSI_REARM (1 << 20)
|
||||
/* see RS480_MSI_REARM in AIC_CNTL for rs480 */
|
||||
/* rs600/rs690/rs740 */
|
||||
# define RS600_BUS_MASTER_DIS (1 << 14)
|
||||
# define RS600_MSI_REARM (1 << 20)
|
||||
/* see RS400_MSI_REARM in AIC_CNTL for rs480 */
|
||||
|
||||
#define RADEON_BUS_CNTL1 0x0034
|
||||
# define RADEON_PMI_BM_DIS (1 << 2)
|
||||
|
@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
|
|||
|
||||
#define RADEON_AIC_CNTL 0x01d0
|
||||
# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
|
||||
# define RS480_MSI_REARM (1 << 3)
|
||||
# define RS400_MSI_REARM (1 << 3)
|
||||
#define RADEON_AIC_STAT 0x01d4
|
||||
#define RADEON_AIC_PT_BASE 0x01d8
|
||||
#define RADEON_AIC_LO_ADDR 0x01dc
|
||||
|
|
|
@ -116,6 +116,18 @@ static const char* temperature_sensors_sets[][36] = {
|
|||
/* Set 9: Macbook Pro 3,1 (Santa Rosa) */
|
||||
{ "TALP", "TB0T", "TC0D", "TC0P", "TG0D", "TG0H", "TTF0", "TW0P",
|
||||
"Th0H", "Th1H", "Th2H", "Tm0P", "Ts0P", NULL },
|
||||
/* Set 10: iMac 5,1 */
|
||||
{ "TA0P", "TC0D", "TC0P", "TG0D", "TH0P", "TO0P", "Tm0P", NULL },
|
||||
/* Set 11: Macbook 5,1 */
|
||||
{ "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", "TC0P", "TN0D", "TN0P",
|
||||
"TTF0", "Th0H", "Th1H", "ThFH", "Ts0P", "Ts0S", NULL },
|
||||
/* Set 12: Macbook Pro 5,1 */
|
||||
{ "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", "TC0F", "TC0P", "TG0D",
|
||||
"TG0F", "TG0H", "TG0P", "TG0T", "TG1H", "TN0D", "TN0P", "TTF0",
|
||||
"Th2H", "Tm0P", "Ts0P", "Ts0S", NULL },
|
||||
/* Set 13: iMac 8,1 */
|
||||
{ "TA0P", "TC0D", "TC0H", "TC0P", "TG0D", "TG0H", "TG0P", "TH0P",
|
||||
"TL0P", "TO0P", "TW0P", "Tm0P", "Tp0P", NULL },
|
||||
};
|
||||
|
||||
/* List of keys used to read/write fan speeds */
|
||||
|
@ -1276,6 +1288,14 @@ static __initdata struct dmi_match_data applesmc_dmi_data[] = {
|
|||
{ .accelerometer = 1, .light = 1, .temperature_set = 8 },
|
||||
/* MacBook Pro 3: accelerometer, backlight and temperature set 9 */
|
||||
{ .accelerometer = 1, .light = 1, .temperature_set = 9 },
|
||||
/* iMac 5: light sensor only, temperature set 10 */
|
||||
{ .accelerometer = 0, .light = 0, .temperature_set = 10 },
|
||||
/* MacBook 5: accelerometer, backlight and temperature set 11 */
|
||||
{ .accelerometer = 1, .light = 1, .temperature_set = 11 },
|
||||
/* MacBook Pro 5: accelerometer, backlight and temperature set 12 */
|
||||
{ .accelerometer = 1, .light = 1, .temperature_set = 12 },
|
||||
/* iMac 8: light sensor only, temperature set 13 */
|
||||
{ .accelerometer = 0, .light = 0, .temperature_set = 13 },
|
||||
};
|
||||
|
||||
/* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1".
|
||||
|
@ -1285,6 +1305,10 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = {
|
|||
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir") },
|
||||
&applesmc_dmi_data[7]},
|
||||
{ applesmc_dmi_match, "Apple MacBook Pro 5", {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5") },
|
||||
&applesmc_dmi_data[12]},
|
||||
{ applesmc_dmi_match, "Apple MacBook Pro 4", {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro4") },
|
||||
|
@ -1305,6 +1329,10 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = {
|
|||
DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME,"MacBook3") },
|
||||
&applesmc_dmi_data[6]},
|
||||
{ applesmc_dmi_match, "Apple MacBook 5", {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5") },
|
||||
&applesmc_dmi_data[11]},
|
||||
{ applesmc_dmi_match, "Apple MacBook", {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME,"MacBook") },
|
||||
|
@ -1317,6 +1345,14 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = {
|
|||
DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME,"MacPro2") },
|
||||
&applesmc_dmi_data[4]},
|
||||
{ applesmc_dmi_match, "Apple iMac 8", {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "iMac8") },
|
||||
&applesmc_dmi_data[13]},
|
||||
{ applesmc_dmi_match, "Apple iMac 5", {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "iMac5") },
|
||||
&applesmc_dmi_data[10]},
|
||||
{ applesmc_dmi_match, "Apple iMac", {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME,"iMac") },
|
||||
|
|
|
@ -1270,8 +1270,14 @@ static int dv1394_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
struct video_card *video = file_to_video_card(file);
|
||||
int retval = -EINVAL;
|
||||
|
||||
/* serialize mmap */
|
||||
mutex_lock(&video->mtx);
|
||||
/*
|
||||
* We cannot use the blocking variant mutex_lock here because .mmap
|
||||
* is called with mmap_sem held, while .ioctl, .read, .write acquire
|
||||
* video->mtx and subsequently call copy_to/from_user which will
|
||||
* grab mmap_sem in case of a page fault.
|
||||
*/
|
||||
if (!mutex_trylock(&video->mtx))
|
||||
return -EAGAIN;
|
||||
|
||||
if ( ! video_card_initialized(video) ) {
|
||||
retval = do_dv1394_init_default(video);
|
||||
|
|
|
@ -155,11 +155,11 @@ struct hpsb_host *hpsb_alloc_host(struct hpsb_host_driver *drv, size_t extra,
|
|||
memcpy(&h->device, &nodemgr_dev_template_host, sizeof(h->device));
|
||||
h->device.parent = dev;
|
||||
set_dev_node(&h->device, dev_to_node(dev));
|
||||
snprintf(h->device.bus_id, BUS_ID_SIZE, "fw-host%d", h->id);
|
||||
dev_set_name(&h->device, "fw-host%d", h->id);
|
||||
|
||||
h->host_dev.parent = &h->device;
|
||||
h->host_dev.class = &hpsb_host_class;
|
||||
snprintf(h->host_dev.bus_id, BUS_ID_SIZE, "fw-host%d", h->id);
|
||||
dev_set_name(&h->host_dev, "fw-host%d", h->id);
|
||||
|
||||
if (device_register(&h->device))
|
||||
goto fail;
|
||||
|
|
|
@ -826,13 +826,11 @@ static struct node_entry *nodemgr_create_node(octlet_t guid,
|
|||
memcpy(&ne->device, &nodemgr_dev_template_ne,
|
||||
sizeof(ne->device));
|
||||
ne->device.parent = &host->device;
|
||||
snprintf(ne->device.bus_id, BUS_ID_SIZE, "%016Lx",
|
||||
(unsigned long long)(ne->guid));
|
||||
dev_set_name(&ne->device, "%016Lx", (unsigned long long)(ne->guid));
|
||||
|
||||
ne->node_dev.parent = &ne->device;
|
||||
ne->node_dev.class = &nodemgr_ne_class;
|
||||
snprintf(ne->node_dev.bus_id, BUS_ID_SIZE, "%016Lx",
|
||||
(unsigned long long)(ne->guid));
|
||||
dev_set_name(&ne->node_dev, "%016Lx", (unsigned long long)(ne->guid));
|
||||
|
||||
if (device_register(&ne->device))
|
||||
goto fail_devreg;
|
||||
|
@ -932,13 +930,11 @@ static void nodemgr_register_device(struct node_entry *ne,
|
|||
|
||||
ud->device.parent = parent;
|
||||
|
||||
snprintf(ud->device.bus_id, BUS_ID_SIZE, "%s-%u",
|
||||
ne->device.bus_id, ud->id);
|
||||
dev_set_name(&ud->device, "%s-%u", dev_name(&ne->device), ud->id);
|
||||
|
||||
ud->unit_dev.parent = &ud->device;
|
||||
ud->unit_dev.class = &nodemgr_ud_class;
|
||||
snprintf(ud->unit_dev.bus_id, BUS_ID_SIZE, "%s-%u",
|
||||
ne->device.bus_id, ud->id);
|
||||
dev_set_name(&ud->unit_dev, "%s-%u", dev_name(&ne->device), ud->id);
|
||||
|
||||
if (device_register(&ud->device))
|
||||
goto fail_devreg;
|
||||
|
@ -953,7 +949,7 @@ static void nodemgr_register_device(struct node_entry *ne,
|
|||
fail_classdevreg:
|
||||
device_unregister(&ud->device);
|
||||
fail_devreg:
|
||||
HPSB_ERR("Failed to create unit %s", ud->device.bus_id);
|
||||
HPSB_ERR("Failed to create unit %s", dev_name(&ud->device));
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -2268,7 +2268,8 @@ static ssize_t raw1394_write(struct file *file, const char __user * buffer,
|
|||
return -EFAULT;
|
||||
}
|
||||
|
||||
mutex_lock(&fi->state_mutex);
|
||||
if (!mutex_trylock(&fi->state_mutex))
|
||||
return -EAGAIN;
|
||||
|
||||
switch (fi->state) {
|
||||
case opened:
|
||||
|
@ -2548,7 +2549,8 @@ static int raw1394_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
struct file_info *fi = file->private_data;
|
||||
int ret;
|
||||
|
||||
mutex_lock(&fi->state_mutex);
|
||||
if (!mutex_trylock(&fi->state_mutex))
|
||||
return -EAGAIN;
|
||||
|
||||
if (fi->iso_state == RAW1394_ISO_INACTIVE)
|
||||
ret = -EINVAL;
|
||||
|
@ -2669,7 +2671,8 @@ static long raw1394_ioctl(struct file *file, unsigned int cmd,
|
|||
break;
|
||||
}
|
||||
|
||||
mutex_lock(&fi->state_mutex);
|
||||
if (!mutex_trylock(&fi->state_mutex))
|
||||
return -EAGAIN;
|
||||
|
||||
switch (fi->iso_state) {
|
||||
case RAW1394_ISO_INACTIVE:
|
||||
|
|
|
@ -148,6 +148,8 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks)
|
|||
|
||||
min_sectors = conf->array_sectors;
|
||||
sector_div(min_sectors, PAGE_SIZE/sizeof(struct dev_info *));
|
||||
if (min_sectors == 0)
|
||||
min_sectors = 1;
|
||||
|
||||
/* min_sectors is the minimum spacing that will fit the hash
|
||||
* table in one PAGE. This may be much smaller than needed.
|
||||
|
|
|
@ -3884,7 +3884,6 @@ static int do_md_stop(mddev_t * mddev, int mode, int is_open)
|
|||
if (mode == 0) {
|
||||
mdk_rdev_t *rdev;
|
||||
struct list_head *tmp;
|
||||
struct block_device *bdev;
|
||||
|
||||
printk(KERN_INFO "md: %s stopped.\n", mdname(mddev));
|
||||
|
||||
|
@ -3941,11 +3940,6 @@ static int do_md_stop(mddev_t * mddev, int mode, int is_open)
|
|||
mddev->degraded = 0;
|
||||
mddev->barriers_work = 0;
|
||||
mddev->safemode = 0;
|
||||
bdev = bdget_disk(mddev->gendisk, 0);
|
||||
if (bdev) {
|
||||
blkdev_ioctl(bdev, 0, BLKRRPART, 0);
|
||||
bdput(bdev);
|
||||
}
|
||||
kobject_uevent(&disk_to_dev(mddev->gendisk)->kobj, KOBJ_CHANGE);
|
||||
|
||||
} else if (mddev->pers)
|
||||
|
|
|
@ -1137,7 +1137,7 @@ static int raid10_add_disk(mddev_t *mddev, mdk_rdev_t *rdev)
|
|||
if (!enough(conf))
|
||||
return -EINVAL;
|
||||
|
||||
if (rdev->raid_disk)
|
||||
if (rdev->raid_disk >= 0)
|
||||
first = last = rdev->raid_disk;
|
||||
|
||||
if (rdev->saved_raid_disk >= 0 &&
|
||||
|
|
|
@ -406,19 +406,6 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)
|
|||
/* Set the default CFI lock/unlock addresses */
|
||||
cfi->addr_unlock1 = 0x555;
|
||||
cfi->addr_unlock2 = 0x2aa;
|
||||
/* Modify the unlock address if we are in compatibility mode */
|
||||
if ( /* x16 in x8 mode */
|
||||
((cfi->device_type == CFI_DEVICETYPE_X8) &&
|
||||
(cfi->cfiq->InterfaceDesc ==
|
||||
CFI_INTERFACE_X8_BY_X16_ASYNC)) ||
|
||||
/* x32 in x16 mode */
|
||||
((cfi->device_type == CFI_DEVICETYPE_X16) &&
|
||||
(cfi->cfiq->InterfaceDesc ==
|
||||
CFI_INTERFACE_X16_BY_X32_ASYNC)))
|
||||
{
|
||||
cfi->addr_unlock1 = 0xaaa;
|
||||
cfi->addr_unlock2 = 0x555;
|
||||
}
|
||||
|
||||
} /* CFI mode */
|
||||
else if (cfi->cfi_mode == CFI_MODE_JEDEC) {
|
||||
|
|
|
@ -1808,9 +1808,7 @@ static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,
|
|||
* several first banks can contain 0x7f instead of actual ID
|
||||
*/
|
||||
do {
|
||||
uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8),
|
||||
cfi_interleave(cfi),
|
||||
cfi->device_type);
|
||||
uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8), map, cfi);
|
||||
mask = (1 << (cfi->device_type * 8)) - 1;
|
||||
result = map_read(map, base + ofs);
|
||||
bank++;
|
||||
|
@ -1824,7 +1822,7 @@ static inline u32 jedec_read_id(struct map_info *map, uint32_t base,
|
|||
{
|
||||
map_word result;
|
||||
unsigned long mask;
|
||||
u32 ofs = cfi_build_cmd_addr(1, cfi_interleave(cfi), cfi->device_type);
|
||||
u32 ofs = cfi_build_cmd_addr(1, map, cfi);
|
||||
mask = (1 << (cfi->device_type * 8)) -1;
|
||||
result = map_read(map, base + ofs);
|
||||
return result.x[0] & mask;
|
||||
|
@ -2067,8 +2065,8 @@ static int jedec_probe_chip(struct map_info *map, __u32 base,
|
|||
|
||||
}
|
||||
/* Ensure the unlock addresses we try stay inside the map */
|
||||
probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type);
|
||||
probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, cfi_interleave(cfi), cfi->device_type);
|
||||
probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, map, cfi);
|
||||
probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, map, cfi);
|
||||
if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) ||
|
||||
((base + probe_offset2 + map_bankwidth(map)) >= map->size))
|
||||
goto retry;
|
||||
|
|
|
@ -38,7 +38,6 @@
|
|||
#include <asm/arch/gpmc.h>
|
||||
#include <asm/arch/onenand.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
#include <asm/arch/gpmc.h>
|
||||
#include <asm/arch/pm.h>
|
||||
|
||||
#include <linux/dma-mapping.h>
|
||||
|
|
|
@ -2010,9 +2010,13 @@ config IGB_LRO
|
|||
If in doubt, say N.
|
||||
|
||||
config IGB_DCA
|
||||
bool "Enable DCA"
|
||||
bool "Direct Cache Access (DCA) Support"
|
||||
default y
|
||||
depends on IGB && DCA && !(IGB=y && DCA=m)
|
||||
---help---
|
||||
Say Y here if you want to use Direct Cache Access (DCA) in the
|
||||
driver. DCA is a method for warming the CPU cache before data
|
||||
is used, with the intent of lessening the impact of cache misses.
|
||||
|
||||
source "drivers/net/ixp2000/Kconfig"
|
||||
|
||||
|
@ -2437,9 +2441,13 @@ config IXGBE
|
|||
will be called ixgbe.
|
||||
|
||||
config IXGBE_DCA
|
||||
bool
|
||||
bool "Direct Cache Access (DCA) Support"
|
||||
default y
|
||||
depends on IXGBE && DCA && !(IXGBE=y && DCA=m)
|
||||
---help---
|
||||
Say Y here if you want to use Direct Cache Access (DCA) in the
|
||||
driver. DCA is a method for warming the CPU cache before data
|
||||
is used, with the intent of lessening the impact of cache misses.
|
||||
|
||||
config IXGB
|
||||
tristate "Intel(R) PRO/10GbE support"
|
||||
|
@ -2489,9 +2497,13 @@ config MYRI10GE
|
|||
will be called myri10ge.
|
||||
|
||||
config MYRI10GE_DCA
|
||||
bool
|
||||
bool "Direct Cache Access (DCA) Support"
|
||||
default y
|
||||
depends on MYRI10GE && DCA && !(MYRI10GE=y && DCA=m)
|
||||
---help---
|
||||
Say Y here if you want to use Direct Cache Access (DCA) in the
|
||||
driver. DCA is a method for warming the CPU cache before data
|
||||
is used, with the intent of lessening the impact of cache misses.
|
||||
|
||||
config NETXEN_NIC
|
||||
tristate "NetXen Multi port (1/10) Gigabit Ethernet NIC"
|
||||
|
|
|
@ -46,7 +46,6 @@
|
|||
#include <linux/vmalloc.h>
|
||||
#include <linux/pagemap.h>
|
||||
#include <linux/tcp.h>
|
||||
#include <linux/mii.h>
|
||||
#include <linux/ethtool.h>
|
||||
#include <linux/if_vlan.h>
|
||||
#include <linux/workqueue.h>
|
||||
|
|
|
@ -564,14 +564,15 @@ static const struct arb_line write_arb_addr[NUM_WR_Q-1] = {
|
|||
|
||||
static void bnx2x_init_pxp(struct bnx2x *bp)
|
||||
{
|
||||
u16 devctl;
|
||||
int r_order, w_order;
|
||||
u32 val, i;
|
||||
|
||||
pci_read_config_word(bp->pdev,
|
||||
bp->pcie_cap + PCI_EXP_DEVCTL, (u16 *)&val);
|
||||
DP(NETIF_MSG_HW, "read 0x%x from devctl\n", (u16)val);
|
||||
w_order = ((val & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
|
||||
r_order = ((val & PCI_EXP_DEVCTL_READRQ) >> 12);
|
||||
bp->pcie_cap + PCI_EXP_DEVCTL, &devctl);
|
||||
DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl);
|
||||
w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
|
||||
r_order = ((devctl & PCI_EXP_DEVCTL_READRQ) >> 12);
|
||||
|
||||
if (r_order > MAX_RD_ORD) {
|
||||
DP(NETIF_MSG_HW, "read order of %d order adjusted to %d\n",
|
||||
|
|
|
@ -59,8 +59,8 @@
|
|||
#include "bnx2x.h"
|
||||
#include "bnx2x_init.h"
|
||||
|
||||
#define DRV_MODULE_VERSION "1.45.22"
|
||||
#define DRV_MODULE_RELDATE "2008/09/09"
|
||||
#define DRV_MODULE_VERSION "1.45.23"
|
||||
#define DRV_MODULE_RELDATE "2008/11/03"
|
||||
#define BNX2X_BC_VER 0x040200
|
||||
|
||||
/* Time in jiffies before concluding the transmitter is hung */
|
||||
|
@ -6481,6 +6481,7 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
|
|||
bnx2x_free_irq(bp);
|
||||
load_error:
|
||||
bnx2x_free_mem(bp);
|
||||
bp->port.pmf = 0;
|
||||
|
||||
/* TBD we really need to reset the chip
|
||||
if we want to recover from this */
|
||||
|
@ -6791,6 +6792,7 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
|
|||
/* Report UNLOAD_DONE to MCP */
|
||||
if (!BP_NOMCP(bp))
|
||||
bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE);
|
||||
bp->port.pmf = 0;
|
||||
|
||||
/* Free SKBs, SGEs, TPA pool and driver internals */
|
||||
bnx2x_free_skbs(bp);
|
||||
|
@ -10204,8 +10206,6 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
netif_carrier_off(dev);
|
||||
|
||||
bp = netdev_priv(dev);
|
||||
bp->msglevel = debug;
|
||||
|
||||
|
@ -10229,6 +10229,8 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
|
|||
goto init_one_exit;
|
||||
}
|
||||
|
||||
netif_carrier_off(dev);
|
||||
|
||||
bp->common.name = board_info[ent->driver_data].name;
|
||||
printk(KERN_INFO "%s: %s (%c%d) PCI-E x%d %s found at mem %lx,"
|
||||
" IRQ %d, ", dev->name, bp->common.name,
|
||||
|
|
|
@ -1099,7 +1099,9 @@ static int __devinit fs_enet_probe(struct of_device *ofdev,
|
|||
ndev->stop = fs_enet_close;
|
||||
ndev->get_stats = fs_enet_get_stats;
|
||||
ndev->set_multicast_list = fs_set_multicast_list;
|
||||
|
||||
#ifdef CONFIG_NET_POLL_CONTROLLER
|
||||
ndev->poll_controller = fs_enet_netpoll;
|
||||
#endif
|
||||
if (fpi->use_napi)
|
||||
netif_napi_add(ndev, &fep->napi, fs_enet_rx_napi,
|
||||
fpi->napi_weight);
|
||||
|
@ -1209,7 +1211,7 @@ static void __exit fs_cleanup(void)
|
|||
static void fs_enet_netpoll(struct net_device *dev)
|
||||
{
|
||||
disable_irq(dev->irq);
|
||||
fs_enet_interrupt(dev->irq, dev, NULL);
|
||||
fs_enet_interrupt(dev->irq, dev);
|
||||
enable_irq(dev->irq);
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -1066,9 +1066,12 @@ static int smi_wait_ready(struct mv643xx_eth_shared_private *msp)
|
|||
return 0;
|
||||
}
|
||||
|
||||
if (!wait_event_timeout(msp->smi_busy_wait, smi_is_done(msp),
|
||||
msecs_to_jiffies(100)))
|
||||
if (!smi_is_done(msp)) {
|
||||
wait_event_timeout(msp->smi_busy_wait, smi_is_done(msp),
|
||||
msecs_to_jiffies(100));
|
||||
if (!smi_is_done(msp))
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -8667,7 +8667,6 @@ static void __devinit niu_device_announce(struct niu *np)
|
|||
static int __devinit niu_pci_init_one(struct pci_dev *pdev,
|
||||
const struct pci_device_id *ent)
|
||||
{
|
||||
unsigned long niureg_base, niureg_len;
|
||||
union niu_parent_id parent_id;
|
||||
struct net_device *dev;
|
||||
struct niu *np;
|
||||
|
@ -8758,10 +8757,7 @@ static int __devinit niu_pci_init_one(struct pci_dev *pdev,
|
|||
|
||||
dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM);
|
||||
|
||||
niureg_base = pci_resource_start(pdev, 0);
|
||||
niureg_len = pci_resource_len(pdev, 0);
|
||||
|
||||
np->regs = ioremap_nocache(niureg_base, niureg_len);
|
||||
np->regs = pci_ioremap_bar(pdev, 0);
|
||||
if (!np->regs) {
|
||||
dev_err(&pdev->dev, PFX "Cannot map device registers, "
|
||||
"aborting.\n");
|
||||
|
|
|
@ -499,7 +499,7 @@ static void smc911x_hardware_send_pkt(struct net_device *dev)
|
|||
#else
|
||||
SMC_PUSH_DATA(lp, buf, len);
|
||||
dev->trans_start = jiffies;
|
||||
dev_kfree_skb(skb);
|
||||
dev_kfree_skb_irq(skb);
|
||||
#endif
|
||||
if (!lp->tx_throttle) {
|
||||
netif_wake_queue(dev);
|
||||
|
|
|
@ -2060,6 +2060,7 @@ static int smc_request_attrib(struct platform_device *pdev,
|
|||
struct net_device *ndev)
|
||||
{
|
||||
struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
|
||||
struct smc_local *lp __maybe_unused = netdev_priv(ndev);
|
||||
|
||||
if (!res)
|
||||
return 0;
|
||||
|
@ -2074,6 +2075,7 @@ static void smc_release_attrib(struct platform_device *pdev,
|
|||
struct net_device *ndev)
|
||||
{
|
||||
struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
|
||||
struct smc_local *lp __maybe_unused = netdev_priv(ndev);
|
||||
|
||||
if (res)
|
||||
release_mem_region(res->start, ATTRIB_SIZE);
|
||||
|
|
|
@ -37,7 +37,6 @@
|
|||
#include <asm/irq.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/types.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
||||
#include "ucc_geth.h"
|
||||
#include "ucc_geth_mii.h"
|
||||
|
|
|
@ -2942,8 +2942,10 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw,
|
|||
sc->opmode != NL80211_IFTYPE_MESH_POINT &&
|
||||
test_bit(ATH_STAT_PROMISC, sc->status))
|
||||
rfilt |= AR5K_RX_FILTER_PROM;
|
||||
if (sc->opmode == NL80211_IFTYPE_ADHOC)
|
||||
if (sc->opmode == NL80211_IFTYPE_STATION ||
|
||||
sc->opmode == NL80211_IFTYPE_ADHOC) {
|
||||
rfilt |= AR5K_RX_FILTER_BEACON;
|
||||
}
|
||||
|
||||
/* Set filters */
|
||||
ath5k_hw_set_rx_filter(ah,rfilt);
|
||||
|
|
|
@ -531,10 +531,10 @@ static int ath5k_hw_proc_5210_rx_status(struct ath5k_hw *ah,
|
|||
AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL);
|
||||
rs->rs_rate = AR5K_REG_MS(rx_status->rx_status_0,
|
||||
AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE);
|
||||
rs->rs_antenna = rx_status->rx_status_0 &
|
||||
AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA;
|
||||
rs->rs_more = rx_status->rx_status_0 &
|
||||
AR5K_5210_RX_DESC_STATUS0_MORE;
|
||||
rs->rs_antenna = AR5K_REG_MS(rx_status->rx_status_0,
|
||||
AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA);
|
||||
rs->rs_more = !!(rx_status->rx_status_0 &
|
||||
AR5K_5210_RX_DESC_STATUS0_MORE);
|
||||
/* TODO: this timestamp is 13 bit, later on we assume 15 bit */
|
||||
rs->rs_tstamp = AR5K_REG_MS(rx_status->rx_status_1,
|
||||
AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP);
|
||||
|
@ -607,10 +607,10 @@ static int ath5k_hw_proc_5212_rx_status(struct ath5k_hw *ah,
|
|||
AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL);
|
||||
rs->rs_rate = AR5K_REG_MS(rx_status->rx_status_0,
|
||||
AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE);
|
||||
rs->rs_antenna = rx_status->rx_status_0 &
|
||||
AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA;
|
||||
rs->rs_more = rx_status->rx_status_0 &
|
||||
AR5K_5212_RX_DESC_STATUS0_MORE;
|
||||
rs->rs_antenna = AR5K_REG_MS(rx_status->rx_status_0,
|
||||
AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA);
|
||||
rs->rs_more = !!(rx_status->rx_status_0 &
|
||||
AR5K_5212_RX_DESC_STATUS0_MORE);
|
||||
rs->rs_tstamp = AR5K_REG_MS(rx_status->rx_status_1,
|
||||
AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP);
|
||||
rs->rs_status = 0;
|
||||
|
|
|
@ -3252,7 +3252,11 @@ static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
|
|||
return;
|
||||
}
|
||||
|
||||
iwl_scan_cancel_timeout(priv, 100);
|
||||
if (iwl_scan_cancel(priv)) {
|
||||
/* cancel scan failed, just live w/ bad key and rely
|
||||
briefly on SW decryption */
|
||||
return;
|
||||
}
|
||||
|
||||
key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
|
||||
key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
|
||||
|
|
|
@ -896,6 +896,13 @@ static void iwl_bg_request_scan(struct work_struct *data)
|
|||
return;
|
||||
|
||||
done:
|
||||
/* Cannot perform scan. Make sure we clear scanning
|
||||
* bits from status so next scan request can be performed.
|
||||
* If we don't clear scanning status bit here all next scan
|
||||
* will fail
|
||||
*/
|
||||
clear_bit(STATUS_SCAN_HW, &priv->status);
|
||||
clear_bit(STATUS_SCANNING, &priv->status);
|
||||
/* inform mac80211 scan aborted */
|
||||
queue_work(priv->workqueue, &priv->scan_completed);
|
||||
mutex_unlock(&priv->mutex);
|
||||
|
|
|
@ -5768,7 +5768,6 @@ static void iwl3945_alive_start(struct iwl3945_priv *priv)
|
|||
if (priv->error_recovering)
|
||||
iwl3945_error_recovery(priv);
|
||||
|
||||
ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
|
||||
return;
|
||||
|
||||
restart:
|
||||
|
@ -6013,6 +6012,7 @@ static void iwl3945_bg_alive_start(struct work_struct *data)
|
|||
mutex_lock(&priv->mutex);
|
||||
iwl3945_alive_start(priv);
|
||||
mutex_unlock(&priv->mutex);
|
||||
ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
|
||||
}
|
||||
|
||||
static void iwl3945_bg_rf_kill(struct work_struct *work)
|
||||
|
@ -6256,6 +6256,11 @@ static void iwl3945_bg_request_scan(struct work_struct *data)
|
|||
n_probes,
|
||||
(void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
|
||||
|
||||
if (scan->channel_count == 0) {
|
||||
IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
|
||||
goto done;
|
||||
}
|
||||
|
||||
cmd.len += le16_to_cpu(scan->tx_cmd.len) +
|
||||
scan->channel_count * sizeof(struct iwl3945_scan_channel);
|
||||
cmd.data = scan;
|
||||
|
@ -6273,6 +6278,14 @@ static void iwl3945_bg_request_scan(struct work_struct *data)
|
|||
return;
|
||||
|
||||
done:
|
||||
/* can not perform scan make sure we clear scanning
|
||||
* bits from status so next scan request can be performed.
|
||||
* if we dont clear scanning status bit here all next scan
|
||||
* will fail
|
||||
*/
|
||||
clear_bit(STATUS_SCAN_HW, &priv->status);
|
||||
clear_bit(STATUS_SCANNING, &priv->status);
|
||||
|
||||
/* inform mac80211 scan aborted */
|
||||
queue_work(priv->workqueue, &priv->scan_completed);
|
||||
mutex_unlock(&priv->mutex);
|
||||
|
|
|
@ -61,6 +61,7 @@ static struct usb_device_id usb_ids[] = {
|
|||
{ USB_DEVICE(0x0105, 0x145f), .driver_info = DEVICE_ZD1211 },
|
||||
/* ZD1211B */
|
||||
{ USB_DEVICE(0x0ace, 0x1215), .driver_info = DEVICE_ZD1211B },
|
||||
{ USB_DEVICE(0x0ace, 0xb215), .driver_info = DEVICE_ZD1211B },
|
||||
{ USB_DEVICE(0x157e, 0x300d), .driver_info = DEVICE_ZD1211B },
|
||||
{ USB_DEVICE(0x079b, 0x0062), .driver_info = DEVICE_ZD1211B },
|
||||
{ USB_DEVICE(0x1582, 0x6003), .driver_info = DEVICE_ZD1211B },
|
||||
|
@ -82,6 +83,7 @@ static struct usb_device_id usb_ids[] = {
|
|||
{ USB_DEVICE(0x0cde, 0x001a), .driver_info = DEVICE_ZD1211B },
|
||||
{ USB_DEVICE(0x0586, 0x340a), .driver_info = DEVICE_ZD1211B },
|
||||
{ USB_DEVICE(0x0471, 0x1237), .driver_info = DEVICE_ZD1211B },
|
||||
{ USB_DEVICE(0x07fa, 0x1196), .driver_info = DEVICE_ZD1211B },
|
||||
/* "Driverless" devices that need ejecting */
|
||||
{ USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER },
|
||||
{ USB_DEVICE(0x0ace, 0x20ff), .driver_info = DEVICE_INSTALLER },
|
||||
|
|
|
@ -12,7 +12,6 @@
|
|||
#include <linux/errno.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/pnp.h>
|
||||
#include <linux/stat.h>
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/slab.h>
|
||||
|
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/ps3.h>
|
||||
#include <asm/lv1call.h>
|
||||
|
|
|
@ -271,7 +271,7 @@ int rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
|
|||
dev_dbg(&rtc->dev, "alarm rollover: %s\n", "year");
|
||||
do {
|
||||
alarm->time.tm_year++;
|
||||
} while (!rtc_valid_tm(&alarm->time));
|
||||
} while (rtc_valid_tm(&alarm->time) != 0);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
|
@ -794,7 +794,7 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
|
|||
goto cleanup2;
|
||||
}
|
||||
|
||||
pr_info("%s: alarms up to one %s%s, %zd bytes nvram, %s irqs\n",
|
||||
pr_info("%s: alarms up to one %s%s, %zd bytes nvram%s\n",
|
||||
cmos_rtc.rtc->dev.bus_id,
|
||||
is_valid_irq(rtc_irq)
|
||||
? (cmos_rtc.mon_alrm
|
||||
|
|
|
@ -36,7 +36,6 @@
|
|||
#include <linux/poll.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/smp_lock.h>
|
||||
#include <linux/genhd.h>
|
||||
#include <linux/blkdev.h>
|
||||
|
||||
|
|
|
@ -1258,6 +1258,8 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
|
|||
atmel_port->clk = clk_get(&pdev->dev, "usart");
|
||||
clk_enable(atmel_port->clk);
|
||||
port->uartclk = clk_get_rate(atmel_port->clk);
|
||||
clk_disable(atmel_port->clk);
|
||||
/* only enable clock when USART is in use */
|
||||
}
|
||||
|
||||
atmel_port->use_dma_rx = data->use_dma_rx;
|
||||
|
@ -1379,6 +1381,8 @@ static int __init atmel_console_setup(struct console *co, char *options)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
clk_enable(atmel_ports[co->index].clk);
|
||||
|
||||
UART_PUT_IDR(port, -1);
|
||||
UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
|
||||
UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
|
||||
|
@ -1403,7 +1407,7 @@ static struct console atmel_console = {
|
|||
.data = &atmel_uart,
|
||||
};
|
||||
|
||||
#define ATMEL_CONSOLE_DEVICE &atmel_console
|
||||
#define ATMEL_CONSOLE_DEVICE (&atmel_console)
|
||||
|
||||
/*
|
||||
* Early console initialization (before VM subsystem initialized).
|
||||
|
@ -1534,6 +1538,15 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
|
|||
if (ret)
|
||||
goto err_add_port;
|
||||
|
||||
if (atmel_is_console_port(&port->uart)
|
||||
&& ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
|
||||
/*
|
||||
* The serial core enabled the clock for us, so undo
|
||||
* the clk_enable() in atmel_console_setup()
|
||||
*/
|
||||
clk_disable(port->clk);
|
||||
}
|
||||
|
||||
device_init_wakeup(&pdev->dev, 1);
|
||||
platform_set_drvdata(pdev, port);
|
||||
|
||||
|
@ -1544,7 +1557,6 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
|
|||
port->rx_ring.buf = NULL;
|
||||
err_alloc_ring:
|
||||
if (!atmel_is_console_port(&port->uart)) {
|
||||
clk_disable(port->clk);
|
||||
clk_put(port->clk);
|
||||
port->clk = NULL;
|
||||
}
|
||||
|
@ -1568,7 +1580,6 @@ static int __devexit atmel_serial_remove(struct platform_device *pdev)
|
|||
|
||||
/* "port" is allocated statically, so we shouldn't free it */
|
||||
|
||||
clk_disable(atmel_port->clk);
|
||||
clk_put(atmel_port->clk);
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -106,7 +106,6 @@
|
|||
|
||||
#include <linux/kernel.h> /* We're doing kernel work */
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include "bit_operations.h"
|
||||
|
|
|
@ -39,7 +39,6 @@
|
|||
#include <asm/uaccess.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
||||
/* Include-File for the Meilhaus ME-4000 I/O board */
|
||||
#include "me4000.h"
|
||||
|
|
|
@ -2083,6 +2083,38 @@ config FB_METRONOME
|
|||
controller. The pre-release name for this device was 8track
|
||||
and could also have been called by some vendors as PVI-nnnn.
|
||||
|
||||
config FB_MB862XX
|
||||
tristate "Fujitsu MB862xx GDC support"
|
||||
depends on FB
|
||||
select FB_CFB_FILLRECT
|
||||
select FB_CFB_COPYAREA
|
||||
select FB_CFB_IMAGEBLIT
|
||||
---help---
|
||||
Frame buffer driver for Fujitsu Carmine/Coral-P(A)/Lime controllers.
|
||||
|
||||
config FB_MB862XX_PCI_GDC
|
||||
bool "Carmine/Coral-P(A) GDC"
|
||||
depends on PCI && FB_MB862XX
|
||||
---help---
|
||||
This enables framebuffer support for Fujitsu Carmine/Coral-P(A)
|
||||
PCI graphics controller devices.
|
||||
|
||||
config FB_MB862XX_LIME
|
||||
bool "Lime GDC"
|
||||
depends on FB_MB862XX
|
||||
depends on OF && !FB_MB862XX_PCI_GDC
|
||||
select FB_FOREIGN_ENDIAN
|
||||
select FB_LITTLE_ENDIAN
|
||||
---help---
|
||||
Framebuffer support for Fujitsu Lime GDC on host CPU bus.
|
||||
|
||||
config FB_PRE_INIT_FB
|
||||
bool "Don't reinitialize, use bootloader's GDC/Display configuration"
|
||||
depends on FB_MB862XX_LIME
|
||||
---help---
|
||||
Select this option if display contents should be inherited as set by
|
||||
the bootloader.
|
||||
|
||||
source "drivers/video/omap/Kconfig"
|
||||
|
||||
source "drivers/video/backlight/Kconfig"
|
||||
|
|
|
@ -122,6 +122,7 @@ obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o
|
|||
obj-$(CONFIG_FB_OMAP) += omap/
|
||||
obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o
|
||||
obj-$(CONFIG_FB_CARMINE) += carminefb.o
|
||||
obj-$(CONFIG_FB_MB862XX) += mb862xx/
|
||||
|
||||
# Platform or fallback drivers go here
|
||||
obj-$(CONFIG_FB_UVESA) += uvesafb.o
|
||||
|
|
|
@ -1002,13 +1002,9 @@ fb_blank(struct fb_info *info, int blank)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static long
|
||||
fb_ioctl(struct file *file, unsigned int cmd,
|
||||
static long do_fb_ioctl(struct fb_info *info, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
struct inode *inode = file->f_path.dentry->d_inode;
|
||||
int fbidx = iminor(inode);
|
||||
struct fb_info *info;
|
||||
struct fb_ops *fb;
|
||||
struct fb_var_screeninfo var;
|
||||
struct fb_fix_screeninfo fix;
|
||||
|
@ -1018,14 +1014,10 @@ fb_ioctl(struct file *file, unsigned int cmd,
|
|||
void __user *argp = (void __user *)arg;
|
||||
long ret = 0;
|
||||
|
||||
info = registered_fb[fbidx];
|
||||
mutex_lock(&info->lock);
|
||||
fb = info->fbops;
|
||||
|
||||
if (!fb) {
|
||||
mutex_unlock(&info->lock);
|
||||
if (!fb)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
switch (cmd) {
|
||||
case FBIOGET_VSCREENINFO:
|
||||
ret = copy_to_user(argp, &info->var,
|
||||
|
@ -1126,6 +1118,21 @@ fb_ioctl(struct file *file, unsigned int cmd,
|
|||
else
|
||||
ret = fb->fb_ioctl(info, cmd, arg);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static long fb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
__acquires(&info->lock)
|
||||
__releases(&info->lock)
|
||||
{
|
||||
struct inode *inode = file->f_path.dentry->d_inode;
|
||||
int fbidx = iminor(inode);
|
||||
struct fb_info *info;
|
||||
long ret;
|
||||
|
||||
info = registered_fb[fbidx];
|
||||
mutex_lock(&info->lock);
|
||||
ret = do_fb_ioctl(info, cmd, arg);
|
||||
mutex_unlock(&info->lock);
|
||||
return ret;
|
||||
}
|
||||
|
@ -1157,8 +1164,8 @@ struct fb_cmap32 {
|
|||
compat_caddr_t transp;
|
||||
};
|
||||
|
||||
static int fb_getput_cmap(struct inode *inode, struct file *file,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
static int fb_getput_cmap(struct fb_info *info, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
struct fb_cmap_user __user *cmap;
|
||||
struct fb_cmap32 __user *cmap32;
|
||||
|
@ -1181,7 +1188,7 @@ static int fb_getput_cmap(struct inode *inode, struct file *file,
|
|||
put_user(compat_ptr(data), &cmap->transp))
|
||||
return -EFAULT;
|
||||
|
||||
err = fb_ioctl(file, cmd, (unsigned long) cmap);
|
||||
err = do_fb_ioctl(info, cmd, (unsigned long) cmap);
|
||||
|
||||
if (!err) {
|
||||
if (copy_in_user(&cmap32->start,
|
||||
|
@ -1223,8 +1230,8 @@ static int do_fscreeninfo_to_user(struct fb_fix_screeninfo *fix,
|
|||
return err;
|
||||
}
|
||||
|
||||
static int fb_get_fscreeninfo(struct inode *inode, struct file *file,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
static int fb_get_fscreeninfo(struct fb_info *info, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
mm_segment_t old_fs;
|
||||
struct fb_fix_screeninfo fix;
|
||||
|
@ -1235,7 +1242,7 @@ static int fb_get_fscreeninfo(struct inode *inode, struct file *file,
|
|||
|
||||
old_fs = get_fs();
|
||||
set_fs(KERNEL_DS);
|
||||
err = fb_ioctl(file, cmd, (unsigned long) &fix);
|
||||
err = do_fb_ioctl(info, cmd, (unsigned long) &fix);
|
||||
set_fs(old_fs);
|
||||
|
||||
if (!err)
|
||||
|
@ -1244,8 +1251,10 @@ static int fb_get_fscreeninfo(struct inode *inode, struct file *file,
|
|||
return err;
|
||||
}
|
||||
|
||||
static long
|
||||
fb_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
static long fb_compat_ioctl(struct file *file, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
__acquires(&info->lock)
|
||||
__releases(&info->lock)
|
||||
{
|
||||
struct inode *inode = file->f_path.dentry->d_inode;
|
||||
int fbidx = iminor(inode);
|
||||
|
@ -1262,16 +1271,16 @@ fb_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||
case FBIOPUT_CON2FBMAP:
|
||||
arg = (unsigned long) compat_ptr(arg);
|
||||
case FBIOBLANK:
|
||||
mutex_unlock(&info->lock);
|
||||
return fb_ioctl(file, cmd, arg);
|
||||
ret = do_fb_ioctl(info, cmd, arg);
|
||||
break;
|
||||
|
||||
case FBIOGET_FSCREENINFO:
|
||||
ret = fb_get_fscreeninfo(inode, file, cmd, arg);
|
||||
ret = fb_get_fscreeninfo(info, cmd, arg);
|
||||
break;
|
||||
|
||||
case FBIOGETCMAP:
|
||||
case FBIOPUTCMAP:
|
||||
ret = fb_getput_cmap(inode, file, cmd, arg);
|
||||
ret = fb_getput_cmap(info, cmd, arg);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -1286,6 +1295,8 @@ fb_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||
|
||||
static int
|
||||
fb_mmap(struct file *file, struct vm_area_struct * vma)
|
||||
__acquires(&info->lock)
|
||||
__releases(&info->lock)
|
||||
{
|
||||
int fbidx = iminor(file->f_path.dentry->d_inode);
|
||||
struct fb_info *info = registered_fb[fbidx];
|
||||
|
@ -1339,6 +1350,8 @@ fb_mmap(struct file *file, struct vm_area_struct * vma)
|
|||
|
||||
static int
|
||||
fb_open(struct inode *inode, struct file *file)
|
||||
__acquires(&info->lock)
|
||||
__releases(&info->lock)
|
||||
{
|
||||
int fbidx = iminor(inode);
|
||||
struct fb_info *info;
|
||||
|
@ -1374,6 +1387,8 @@ fb_open(struct inode *inode, struct file *file)
|
|||
|
||||
static int
|
||||
fb_release(struct inode *inode, struct file *file)
|
||||
__acquires(&info->lock)
|
||||
__releases(&info->lock)
|
||||
{
|
||||
struct fb_info * const info = file->private_data;
|
||||
|
||||
|
|
5
drivers/video/mb862xx/Makefile
Normal file
5
drivers/video/mb862xx/Makefile
Normal file
|
@ -0,0 +1,5 @@
|
|||
#
|
||||
# Makefile for the MB862xx framebuffer driver
|
||||
#
|
||||
|
||||
obj-$(CONFIG_FB_MB862XX) := mb862xxfb.o
|
138
drivers/video/mb862xx/mb862xx_reg.h
Normal file
138
drivers/video/mb862xx/mb862xx_reg.h
Normal file
|
@ -0,0 +1,138 @@
|
|||
/*
|
||||
* Fujitsu MB862xx Graphics Controller Registers/Bits
|
||||
*/
|
||||
|
||||
#ifndef _MB862XX_REG_H
|
||||
#define _MB862XX_REG_H
|
||||
|
||||
#ifdef MB862XX_MMIO_BOTTOM
|
||||
#define MB862XX_MMIO_BASE 0x03fc0000
|
||||
#else
|
||||
#define MB862XX_MMIO_BASE 0x01fc0000
|
||||
#endif
|
||||
#define MB862XX_I2C_BASE 0x0000c000
|
||||
#define MB862XX_DISP_BASE 0x00010000
|
||||
#define MB862XX_CAP_BASE 0x00018000
|
||||
#define MB862XX_DRAW_BASE 0x00030000
|
||||
#define MB862XX_GEO_BASE 0x00038000
|
||||
#define MB862XX_PIO_BASE 0x00038000
|
||||
#define MB862XX_MMIO_SIZE 0x40000
|
||||
|
||||
/* Host interface/pio registers */
|
||||
#define GC_IST 0x00000020
|
||||
#define GC_IMASK 0x00000024
|
||||
#define GC_SRST 0x0000002c
|
||||
#define GC_CCF 0x00000038
|
||||
#define GC_CID 0x000000f0
|
||||
#define GC_REVISION 0x00000084
|
||||
|
||||
#define GC_CCF_CGE_100 0x00000000
|
||||
#define GC_CCF_CGE_133 0x00040000
|
||||
#define GC_CCF_CGE_166 0x00080000
|
||||
#define GC_CCF_COT_100 0x00000000
|
||||
#define GC_CCF_COT_133 0x00010000
|
||||
#define GC_CID_CNAME_MSK 0x0000ff00
|
||||
#define GC_CID_VERSION_MSK 0x000000ff
|
||||
|
||||
/* define enabled interrupts hereby */
|
||||
#define GC_INT_EN 0x00000000
|
||||
|
||||
/* Memory interface mode register */
|
||||
#define GC_MMR 0x0000fffc
|
||||
|
||||
/* Display Controller registers */
|
||||
#define GC_DCM0 0x00000000
|
||||
#define GC_HTP 0x00000004
|
||||
#define GC_HDB_HDP 0x00000008
|
||||
#define GC_VSW_HSW_HSP 0x0000000c
|
||||
#define GC_VTR 0x00000010
|
||||
#define GC_VDP_VSP 0x00000014
|
||||
#define GC_WY_WX 0x00000018
|
||||
#define GC_WH_WW 0x0000001c
|
||||
#define GC_L0M 0x00000020
|
||||
#define GC_L0OA0 0x00000024
|
||||
#define GC_L0DA0 0x00000028
|
||||
#define GC_L0DY_L0DX 0x0000002c
|
||||
#define GC_DCM1 0x00000100
|
||||
#define GC_L0EM 0x00000110
|
||||
#define GC_L0WY_L0WX 0x00000114
|
||||
#define GC_L0WH_L0WW 0x00000118
|
||||
#define GC_DCM2 0x00000104
|
||||
#define GC_DCM3 0x00000108
|
||||
#define GC_CPM_CUTC 0x000000a0
|
||||
#define GC_CUOA0 0x000000a4
|
||||
#define GC_CUY0_CUX0 0x000000a8
|
||||
#define GC_CUOA1 0x000000ac
|
||||
#define GC_CUY1_CUX1 0x000000b0
|
||||
#define GC_L0PAL0 0x00000400
|
||||
|
||||
#define GC_CPM_CEN0 0x00100000
|
||||
#define GC_CPM_CEN1 0x00200000
|
||||
|
||||
#define GC_DCM01_ESY 0x00000004
|
||||
#define GC_DCM01_SC 0x00003f00
|
||||
#define GC_DCM01_RESV 0x00004000
|
||||
#define GC_DCM01_CKS 0x00008000
|
||||
#define GC_DCM01_L0E 0x00010000
|
||||
#define GC_DCM01_DEN 0x80000000
|
||||
#define GC_L0M_L0C_8 0x00000000
|
||||
#define GC_L0M_L0C_16 0x80000000
|
||||
#define GC_L0EM_L0EC_24 0x40000000
|
||||
#define GC_L0M_L0W_UNIT 64
|
||||
|
||||
#define GC_DISP_REFCLK_400 400
|
||||
|
||||
/* Carmine specific */
|
||||
#define MB86297_DRAW_BASE 0x00020000
|
||||
#define MB86297_DISP0_BASE 0x00100000
|
||||
#define MB86297_DISP1_BASE 0x00140000
|
||||
#define MB86297_WRBACK_BASE 0x00180000
|
||||
#define MB86297_CAP0_BASE 0x00200000
|
||||
#define MB86297_CAP1_BASE 0x00280000
|
||||
#define MB86297_DRAMCTRL_BASE 0x00300000
|
||||
#define MB86297_CTRL_BASE 0x00400000
|
||||
#define MB86297_I2C_BASE 0x00500000
|
||||
|
||||
#define GC_CTRL_STATUS 0x00000000
|
||||
#define GC_CTRL_INT_MASK 0x00000004
|
||||
#define GC_CTRL_CLK_ENABLE 0x0000000c
|
||||
#define GC_CTRL_SOFT_RST 0x00000010
|
||||
|
||||
#define GC_CTRL_CLK_EN_DRAM 0x00000001
|
||||
#define GC_CTRL_CLK_EN_2D3D 0x00000002
|
||||
#define GC_CTRL_CLK_EN_DISP0 0x00000020
|
||||
#define GC_CTRL_CLK_EN_DISP1 0x00000040
|
||||
|
||||
#define GC_2D3D_REV 0x000004b4
|
||||
#define GC_RE_REVISION 0x24240200
|
||||
|
||||
/* define enabled interrupts hereby */
|
||||
#define GC_CARMINE_INT_EN 0x00000004
|
||||
|
||||
/* DRAM controller */
|
||||
#define GC_DCTL_MODE_ADD 0x00000000
|
||||
#define GC_DCTL_SETTIME1_EMODE 0x00000004
|
||||
#define GC_DCTL_REFRESH_SETTIME2 0x00000008
|
||||
#define GC_DCTL_RSV0_STATES 0x0000000C
|
||||
#define GC_DCTL_RSV2_RSV1 0x00000010
|
||||
#define GC_DCTL_DDRIF2_DDRIF1 0x00000014
|
||||
#define GC_DCTL_IOCONT1_IOCONT0 0x00000024
|
||||
|
||||
#define GC_DCTL_STATES_MSK 0x0000000f
|
||||
#define GC_DCTL_INIT_WAIT_CNT 3000
|
||||
#define GC_DCTL_INIT_WAIT_INTERVAL 1
|
||||
|
||||
/* DRAM ctrl values for Carmine PCI Eval. board */
|
||||
#define GC_EVB_DCTL_MODE_ADD 0x012105c3
|
||||
#define GC_EVB_DCTL_MODE_ADD_AFT_RST 0x002105c3
|
||||
#define GC_EVB_DCTL_SETTIME1_EMODE 0x47498000
|
||||
#define GC_EVB_DCTL_REFRESH_SETTIME2 0x00422a22
|
||||
#define GC_EVB_DCTL_RSV0_STATES 0x00200003
|
||||
#define GC_EVB_DCTL_RSV0_STATES_AFT_RST 0x00200002
|
||||
#define GC_EVB_DCTL_RSV2_RSV1 0x0000000f
|
||||
#define GC_EVB_DCTL_DDRIF2_DDRIF1 0x00556646
|
||||
#define GC_EVB_DCTL_IOCONT1_IOCONT0 0x05550555
|
||||
|
||||
#define GC_DISP_REFCLK_533 533
|
||||
|
||||
#endif
|
1061
drivers/video/mb862xx/mb862xxfb.c
Normal file
1061
drivers/video/mb862xx/mb862xxfb.c
Normal file
File diff suppressed because it is too large
Load diff
83
drivers/video/mb862xx/mb862xxfb.h
Normal file
83
drivers/video/mb862xx/mb862xxfb.h
Normal file
|
@ -0,0 +1,83 @@
|
|||
#ifndef __MB862XX_H__
|
||||
#define __MB862XX_H__
|
||||
|
||||
#define PCI_VENDOR_ID_FUJITSU_LIMITED 0x10cf
|
||||
#define PCI_DEVICE_ID_FUJITSU_CORALP 0x2019
|
||||
#define PCI_DEVICE_ID_FUJITSU_CORALPA 0x201e
|
||||
#define PCI_DEVICE_ID_FUJITSU_CARMINE 0x202b
|
||||
|
||||
#define GC_MMR_CORALP_EVB_VAL 0x11d7fa13
|
||||
|
||||
enum gdctype {
|
||||
BT_NONE,
|
||||
BT_LIME,
|
||||
BT_MINT,
|
||||
BT_CORAL,
|
||||
BT_CORALP,
|
||||
BT_CARMINE,
|
||||
};
|
||||
|
||||
struct mb862xx_gc_mode {
|
||||
struct fb_videomode def_mode; /* mode of connected display */
|
||||
unsigned int def_bpp; /* default depth */
|
||||
unsigned long max_vram; /* connected SDRAM size */
|
||||
unsigned long ccf; /* gdc clk */
|
||||
unsigned long mmr; /* memory mode for SDRAM */
|
||||
};
|
||||
|
||||
/* private data */
|
||||
struct mb862xxfb_par {
|
||||
struct fb_info *info; /* fb info head */
|
||||
struct device *dev;
|
||||
struct pci_dev *pdev;
|
||||
struct resource *res; /* framebuffer/mmio resource */
|
||||
|
||||
resource_size_t fb_base_phys; /* fb base, 36-bit PPC440EPx */
|
||||
resource_size_t mmio_base_phys; /* io base addr */
|
||||
void __iomem *fb_base; /* remapped framebuffer */
|
||||
void __iomem *mmio_base; /* remapped registers */
|
||||
size_t mapped_vram; /* length of remapped vram */
|
||||
size_t mmio_len; /* length of register region */
|
||||
|
||||
void __iomem *host; /* relocatable reg. bases */
|
||||
void __iomem *i2c;
|
||||
void __iomem *disp;
|
||||
void __iomem *disp1;
|
||||
void __iomem *cap;
|
||||
void __iomem *cap1;
|
||||
void __iomem *draw;
|
||||
void __iomem *geo;
|
||||
void __iomem *pio;
|
||||
void __iomem *ctrl;
|
||||
void __iomem *dram_ctrl;
|
||||
void __iomem *wrback;
|
||||
|
||||
unsigned int irq;
|
||||
unsigned int type; /* GDC type */
|
||||
unsigned int refclk; /* disp. reference clock */
|
||||
struct mb862xx_gc_mode *gc_mode; /* GDC mode init data */
|
||||
int pre_init; /* don't init display if 1 */
|
||||
|
||||
u32 pseudo_palette[16];
|
||||
};
|
||||
|
||||
#if defined(CONFIG_FB_MB862XX_LIME) && defined(CONFIG_FB_MB862XX_PCI_GDC)
|
||||
#error "Select Lime GDC or CoralP/Carmine support, but not both together"
|
||||
#endif
|
||||
#if defined(CONFIG_FB_MB862XX_LIME)
|
||||
#define gdc_read __raw_readl
|
||||
#define gdc_write __raw_writel
|
||||
#else
|
||||
#define gdc_read readl
|
||||
#define gdc_write writel
|
||||
#endif
|
||||
|
||||
#define inreg(type, off) \
|
||||
gdc_read((par->type + (off)))
|
||||
|
||||
#define outreg(type, off, val) \
|
||||
gdc_write((val), (par->type + (off)))
|
||||
|
||||
#define pack(a, b) (((a) << 16) | (b))
|
||||
|
||||
#endif
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue