sh: extend INTC with struct intc_hw_desc
This patch updates the INTC code by moving all vectors, groups and registers from struct intc_desc to struct intc_hw_desc. The idea is that INTC tables should go from using the macro(s) DECLARE_INTC_DESC..() only to using struct intc_desc with name and hw initialized using the macro INTC_HW_DESC(). This move makes it easy to initialize an extended struct intc_desc in the future. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm
Paul Mundt
parent
6339204ecc
commit
577cd7584c
2 changed files with 65 additions and 54 deletions
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@ -400,11 +400,11 @@ static unsigned int __init intc_get_reg(struct intc_desc_int *d,
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static intc_enum __init intc_grp_id(struct intc_desc *desc,
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intc_enum enum_id)
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{
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struct intc_group *g = desc->groups;
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struct intc_group *g = desc->hw.groups;
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unsigned int i, j;
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for (i = 0; g && enum_id && i < desc->nr_groups; i++) {
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g = desc->groups + i;
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for (i = 0; g && enum_id && i < desc->hw.nr_groups; i++) {
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g = desc->hw.groups + i;
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for (j = 0; g->enum_ids[j]; j++) {
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if (g->enum_ids[j] != enum_id)
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@ -421,12 +421,12 @@ static unsigned int __init intc_mask_data(struct intc_desc *desc,
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struct intc_desc_int *d,
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intc_enum enum_id, int do_grps)
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{
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struct intc_mask_reg *mr = desc->mask_regs;
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struct intc_mask_reg *mr = desc->hw.mask_regs;
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unsigned int i, j, fn, mode;
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unsigned long reg_e, reg_d;
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for (i = 0; mr && enum_id && i < desc->nr_mask_regs; i++) {
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mr = desc->mask_regs + i;
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for (i = 0; mr && enum_id && i < desc->hw.nr_mask_regs; i++) {
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mr = desc->hw.mask_regs + i;
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for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
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if (mr->enum_ids[j] != enum_id)
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@ -469,12 +469,12 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
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struct intc_desc_int *d,
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intc_enum enum_id, int do_grps)
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{
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struct intc_prio_reg *pr = desc->prio_regs;
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struct intc_prio_reg *pr = desc->hw.prio_regs;
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unsigned int i, j, fn, mode, bit;
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unsigned long reg_e, reg_d;
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for (i = 0; pr && enum_id && i < desc->nr_prio_regs; i++) {
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pr = desc->prio_regs + i;
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for (i = 0; pr && enum_id && i < desc->hw.nr_prio_regs; i++) {
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pr = desc->hw.prio_regs + i;
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for (j = 0; j < ARRAY_SIZE(pr->enum_ids); j++) {
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if (pr->enum_ids[j] != enum_id)
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@ -517,12 +517,12 @@ static unsigned int __init intc_ack_data(struct intc_desc *desc,
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struct intc_desc_int *d,
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intc_enum enum_id)
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{
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struct intc_mask_reg *mr = desc->ack_regs;
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struct intc_mask_reg *mr = desc->hw.ack_regs;
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unsigned int i, j, fn, mode;
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unsigned long reg_e, reg_d;
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for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) {
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mr = desc->ack_regs + i;
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for (i = 0; mr && enum_id && i < desc->hw.nr_ack_regs; i++) {
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mr = desc->hw.ack_regs + i;
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for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
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if (mr->enum_ids[j] != enum_id)
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@ -549,11 +549,11 @@ static unsigned int __init intc_sense_data(struct intc_desc *desc,
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struct intc_desc_int *d,
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intc_enum enum_id)
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{
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struct intc_sense_reg *sr = desc->sense_regs;
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struct intc_sense_reg *sr = desc->hw.sense_regs;
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unsigned int i, j, fn, bit;
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for (i = 0; sr && enum_id && i < desc->nr_sense_regs; i++) {
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sr = desc->sense_regs + i;
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for (i = 0; sr && enum_id && i < desc->hw.nr_sense_regs; i++) {
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sr = desc->hw.sense_regs + i;
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for (j = 0; j < ARRAY_SIZE(sr->enum_ids); j++) {
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if (sr->enum_ids[j] != enum_id)
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@ -656,7 +656,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
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/* irq should be disabled by default */
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d->chip.mask(irq);
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if (desc->ack_regs)
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if (desc->hw.ack_regs)
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ack_handle[irq] = intc_ack_data(desc, d, enum_id);
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}
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@ -684,6 +684,7 @@ static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc)
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void __init register_intc_controller(struct intc_desc *desc)
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{
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unsigned int i, k, smp;
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struct intc_hw_desc *hw = &desc->hw;
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struct intc_desc_int *d;
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d = kzalloc(sizeof(*d), GFP_NOWAIT);
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@ -691,10 +692,10 @@ void __init register_intc_controller(struct intc_desc *desc)
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INIT_LIST_HEAD(&d->list);
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list_add(&d->list, &intc_list);
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d->nr_reg = desc->mask_regs ? desc->nr_mask_regs * 2 : 0;
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d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
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d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
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d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
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d->nr_reg = hw->mask_regs ? hw->nr_mask_regs * 2 : 0;
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d->nr_reg += hw->prio_regs ? hw->nr_prio_regs * 2 : 0;
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d->nr_reg += hw->sense_regs ? hw->nr_sense_regs : 0;
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d->nr_reg += hw->ack_regs ? hw->nr_ack_regs : 0;
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d->reg = kzalloc(d->nr_reg * sizeof(*d->reg), GFP_NOWAIT);
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#ifdef CONFIG_SMP
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@ -702,30 +703,31 @@ void __init register_intc_controller(struct intc_desc *desc)
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#endif
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k = 0;
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if (desc->mask_regs) {
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for (i = 0; i < desc->nr_mask_regs; i++) {
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smp = IS_SMP(desc->mask_regs[i]);
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k += save_reg(d, k, desc->mask_regs[i].set_reg, smp);
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k += save_reg(d, k, desc->mask_regs[i].clr_reg, smp);
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if (hw->mask_regs) {
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for (i = 0; i < hw->nr_mask_regs; i++) {
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smp = IS_SMP(hw->mask_regs[i]);
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k += save_reg(d, k, hw->mask_regs[i].set_reg, smp);
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k += save_reg(d, k, hw->mask_regs[i].clr_reg, smp);
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}
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}
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if (desc->prio_regs) {
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d->prio = kzalloc(desc->nr_vectors * sizeof(*d->prio), GFP_NOWAIT);
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if (hw->prio_regs) {
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d->prio = kzalloc(hw->nr_vectors * sizeof(*d->prio),
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GFP_NOWAIT);
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for (i = 0; i < desc->nr_prio_regs; i++) {
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smp = IS_SMP(desc->prio_regs[i]);
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k += save_reg(d, k, desc->prio_regs[i].set_reg, smp);
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k += save_reg(d, k, desc->prio_regs[i].clr_reg, smp);
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for (i = 0; i < hw->nr_prio_regs; i++) {
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smp = IS_SMP(hw->prio_regs[i]);
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k += save_reg(d, k, hw->prio_regs[i].set_reg, smp);
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k += save_reg(d, k, hw->prio_regs[i].clr_reg, smp);
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}
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}
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if (desc->sense_regs) {
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d->sense = kzalloc(desc->nr_vectors * sizeof(*d->sense), GFP_NOWAIT);
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if (hw->sense_regs) {
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d->sense = kzalloc(hw->nr_vectors * sizeof(*d->sense),
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GFP_NOWAIT);
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for (i = 0; i < desc->nr_sense_regs; i++) {
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k += save_reg(d, k, desc->sense_regs[i].reg, 0);
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}
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for (i = 0; i < hw->nr_sense_regs; i++)
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k += save_reg(d, k, hw->sense_regs[i].reg, 0);
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}
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d->chip.name = desc->name;
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@ -738,9 +740,9 @@ void __init register_intc_controller(struct intc_desc *desc)
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d->chip.set_type = intc_set_sense;
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d->chip.set_wake = intc_set_wake;
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if (desc->ack_regs) {
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for (i = 0; i < desc->nr_ack_regs; i++)
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k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
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if (hw->ack_regs) {
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for (i = 0; i < hw->nr_ack_regs; i++)
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k += save_reg(d, k, hw->ack_regs[i].set_reg, 0);
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d->chip.mask_ack = intc_mask_ack;
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}
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@ -748,8 +750,8 @@ void __init register_intc_controller(struct intc_desc *desc)
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BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
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/* register the vectors one by one */
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for (i = 0; i < desc->nr_vectors; i++) {
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struct intc_vect *vect = desc->vectors + i;
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for (i = 0; i < hw->nr_vectors; i++) {
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struct intc_vect *vect = hw->vectors + i;
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unsigned int irq = evt2irq(vect->vect);
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struct irq_desc *irq_desc;
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@ -764,8 +766,8 @@ void __init register_intc_controller(struct intc_desc *desc)
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intc_register_irq(desc, d, vect->enum_id, irq);
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for (k = i + 1; k < desc->nr_vectors; k++) {
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struct intc_vect *vect2 = desc->vectors + k;
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for (k = i + 1; k < hw->nr_vectors; k++) {
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struct intc_vect *vect2 = hw->vectors + k;
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unsigned int irq2 = evt2irq(vect2->vect);
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if (vect->enum_id != vect2->enum_id)
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@ -45,7 +45,7 @@ struct intc_sense_reg {
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#define INTC_SMP(stride, nr)
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#endif
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struct intc_desc {
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struct intc_hw_desc {
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struct intc_vect *vectors;
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unsigned int nr_vectors;
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struct intc_group *groups;
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@ -56,29 +56,38 @@ struct intc_desc {
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unsigned int nr_prio_regs;
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struct intc_sense_reg *sense_regs;
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unsigned int nr_sense_regs;
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char *name;
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struct intc_mask_reg *ack_regs;
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unsigned int nr_ack_regs;
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};
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#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
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#define INTC_HW_DESC(vectors, groups, mask_regs, \
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prio_regs, sense_regs, ack_regs) \
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{ \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
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}
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struct intc_desc {
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char *name;
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struct intc_hw_desc hw;
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};
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#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs) \
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struct intc_desc symbol __initdata = { \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), \
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chipname, \
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.name = chipname, \
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.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
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prio_regs, sense_regs, NULL), \
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}
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#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs, ack_regs) \
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struct intc_desc symbol __initdata = { \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), \
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chipname, \
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_INTC_ARRAY(ack_regs), \
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.name = chipname, \
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.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
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prio_regs, sense_regs, ack_regs), \
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}
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void __init register_intc_controller(struct intc_desc *desc);
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