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x86:

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* zero all padding for KVM_GET_DEBUGREGS
 
 * fix rST warning
 
 * disable vPMU support on hybrid CPUs
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull kvm/x86 fixes from Paolo Bonzini:

 - zero all padding for KVM_GET_DEBUGREGS

 - fix rST warning

 - disable vPMU support on hybrid CPUs

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  kvm: initialize all of the kvm_debugregs structure before sending it to userspace
  perf/x86: Refuse to export capabilities for hybrid PMUs
  KVM: x86/pmu: Disable vPMU support on hybrid CPUs (host PMUs)
  Documentation/hw-vuln: Fix rST warning
This commit is contained in:
Linus Torvalds 2023-02-18 11:07:32 -08:00
commit 5e725d112e
4 changed files with 28 additions and 16 deletions
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3
Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst
View file

@ -88,5 +88,4 @@ capability to override those interceptions, but since this is not common, the
mitigation that covers this path is not enabled by default. mitigation that covers this path is not enabled by default.
The mitigation for the KVM_CAP_X86_DISABLE_EXITS capability can be turned on The mitigation for the KVM_CAP_X86_DISABLE_EXITS capability can be turned on
using the boolean module parameter mitigate_smt_rsb, e.g.: using the boolean module parameter mitigate_smt_rsb, e.g. ``kvm.mitigate_smt_rsb=1``.
kvm.mitigate_smt_rsb=1

12
arch/x86/events/core.c
View file

@ -2974,17 +2974,19 @@ unsigned long perf_misc_flags(struct pt_regs *regs)
void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap) void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
{ {
if (!x86_pmu_initialized()) { /* This API doesn't currently support enumerating hybrid PMUs. */
if (WARN_ON_ONCE(cpu_feature_enabled(X86_FEATURE_HYBRID_CPU)) ||
!x86_pmu_initialized()) {
memset(cap, 0, sizeof(*cap)); memset(cap, 0, sizeof(*cap));
return; return;
} }
cap->version = x86_pmu.version;
/* /*
* KVM doesn't support the hybrid PMU yet. * Note, hybrid CPU models get tracked as having hybrid PMUs even when
* Return the common value in global x86_pmu, * all E-cores are disabled via BIOS. When E-cores are disabled, the
* which available for all cores. * base PMU holds the correct number of counters for P-cores.
*/ */
cap->version = x86_pmu.version;
cap->num_counters_gp = x86_pmu.num_counters; cap->num_counters_gp = x86_pmu.num_counters;
cap->num_counters_fixed = x86_pmu.num_counters_fixed; cap->num_counters_fixed = x86_pmu.num_counters_fixed;
cap->bit_width_gp = x86_pmu.cntval_bits; cap->bit_width_gp = x86_pmu.cntval_bits;

26
arch/x86/kvm/pmu.h
View file

@ -165,15 +165,27 @@ static inline void kvm_init_pmu_capability(void)
{ {
bool is_intel = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL; bool is_intel = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL;
perf_get_x86_pmu_capability(&kvm_pmu_cap); /*
* Hybrid PMUs don't play nice with virtualization without careful
/* * configuration by userspace, and KVM's APIs for reporting supported
* For Intel, only support guest architectural pmu * vPMU features do not account for hybrid PMUs. Disable vPMU support
* on a host with architectural pmu. * for hybrid PMUs until KVM gains a way to let userspace opt-in.
*/ */
if ((is_intel && !kvm_pmu_cap.version) || !kvm_pmu_cap.num_counters_gp) if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU))
enable_pmu = false; enable_pmu = false;
if (enable_pmu) {
perf_get_x86_pmu_capability(&kvm_pmu_cap);
/*
* For Intel, only support guest architectural pmu
* on a host with architectural pmu.
*/
if ((is_intel && !kvm_pmu_cap.version) ||
!kvm_pmu_cap.num_counters_gp)
enable_pmu = false;
}
if (!enable_pmu) { if (!enable_pmu) {
memset(&kvm_pmu_cap, 0, sizeof(kvm_pmu_cap)); memset(&kvm_pmu_cap, 0, sizeof(kvm_pmu_cap));
return; return;

3
arch/x86/kvm/x86.c
View file

@ -5263,12 +5263,11 @@ static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
{ {
unsigned long val; unsigned long val;
memset(dbgregs, 0, sizeof(*dbgregs));
memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db)); memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
kvm_get_dr(vcpu, 6, &val); kvm_get_dr(vcpu, 6, &val);
dbgregs->dr6 = val; dbgregs->dr6 = val;
dbgregs->dr7 = vcpu->arch.dr7; dbgregs->dr7 = vcpu->arch.dr7;
dbgregs->flags = 0;
memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
} }
static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu, static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,