net: dsa: don't enumerate dsa_switch and dsa_port bit fields using commas
This is a cosmetic incremental fixup to commits7787ff7763
("net: dsa: merge all bools of struct dsa_switch into a single u32")bde82f389a
("net: dsa: merge all bools of struct dsa_port into a single u8") The desire to make this change was enunciated after posting these patches here: https://patchwork.kernel.org/project/netdevbpf/cover/20220105132141.2648876-1-vladimir.oltean@nxp.com/ but due to a slight timing overlap (message posted at 2:28 p.m. UTC, merge commit is at 2:46 p.m. UTC), that comment was missed and the changes were applied as-is. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 56 additions and 58 deletions
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@ -265,14 +265,16 @@ struct dsa_port {
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u8 stp_state;
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u8 vlan_filtering:1,
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/* Managed by DSA on user ports and by
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* drivers on CPU and DSA ports
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*/
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learning:1,
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lag_tx_enabled:1,
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devlink_port_setup:1,
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setup:1;
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u8 vlan_filtering:1;
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/* Managed by DSA on user ports and by drivers on CPU and DSA ports */
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u8 learning:1;
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u8 lag_tx_enabled:1;
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u8 devlink_port_setup:1;
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u8 setup:1;
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struct device_node *dn;
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unsigned int ageing_time;
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@ -331,56 +333,52 @@ struct dsa_switch {
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struct dsa_switch_tree *dst;
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unsigned int index;
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u32 setup:1,
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/* Disallow bridge core from requesting
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* different VLAN awareness settings on ports
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* if not hardware-supported
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*/
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vlan_filtering_is_global:1,
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/* Keep VLAN filtering enabled on ports not
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* offloading any upper
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*/
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needs_standalone_vlan_filtering:1,
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/* Pass .port_vlan_add and .port_vlan_del to
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* drivers even for bridges that have
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* vlan_filtering=0. All drivers should ideally
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* set this (and then the option would get
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* removed), but it is unknown whether this
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* would break things or not.
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*/
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configure_vlan_while_not_filtering:1,
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/* If the switch driver always programs the CPU
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* port as egress tagged despite the VLAN
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* configuration indicating otherwise, then
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* setting @untag_bridge_pvid will force the
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* DSA receive path to pop the bridge's
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* default_pvid VLAN tagged frames to offer a
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* consistent behavior between a
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* vlan_filtering=0 and vlan_filtering=1 bridge
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* device.
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*/
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untag_bridge_pvid:1,
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/* Let DSA manage the FDB entries towards the
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* CPU, based on the software bridge database.
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*/
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assisted_learning_on_cpu_port:1,
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/* In case vlan_filtering_is_global is set, the
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* VLAN awareness state should be retrieved
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* from here and not from the per-port
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* settings.
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*/
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vlan_filtering:1,
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/* MAC PCS does not provide link state change
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* interrupt, and requires polling. Flag passed
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* on to PHYLINK.
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*/
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pcs_poll:1,
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/* For switches that only have the MRU
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* configurable. To ensure the configured MTU
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* is not exceeded, normalization of MRU on all
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* bridged interfaces is needed.
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*/
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mtu_enforcement_ingress:1;
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u32 setup:1;
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/* Disallow bridge core from requesting different VLAN awareness
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* settings on ports if not hardware-supported
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*/
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u32 vlan_filtering_is_global:1;
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/* Keep VLAN filtering enabled on ports not offloading any upper */
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u32 needs_standalone_vlan_filtering:1;
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/* Pass .port_vlan_add and .port_vlan_del to drivers even for bridges
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* that have vlan_filtering=0. All drivers should ideally set this (and
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* then the option would get removed), but it is unknown whether this
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* would break things or not.
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*/
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u32 configure_vlan_while_not_filtering:1;
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/* If the switch driver always programs the CPU port as egress tagged
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* despite the VLAN configuration indicating otherwise, then setting
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* @untag_bridge_pvid will force the DSA receive path to pop the
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* bridge's default_pvid VLAN tagged frames to offer a consistent
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* behavior between a vlan_filtering=0 and vlan_filtering=1 bridge
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* device.
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*/
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u32 untag_bridge_pvid:1;
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/* Let DSA manage the FDB entries towards the
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* CPU, based on the software bridge database.
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*/
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u32 assisted_learning_on_cpu_port:1;
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/* In case vlan_filtering_is_global is set, the VLAN awareness state
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* should be retrieved from here and not from the per-port settings.
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*/
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u32 vlan_filtering:1;
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/* MAC PCS does not provide link state change interrupt, and requires
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* polling. Flag passed on to PHYLINK.
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*/
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u32 pcs_poll:1;
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/* For switches that only have the MRU configurable. To ensure the
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* configured MTU is not exceeded, normalization of MRU on all bridged
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* interfaces is needed.
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*/
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u32 mtu_enforcement_ingress:1;
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/* Listener for switch fabric events */
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struct notifier_block nb;
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