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PCI: Clean up quirk_io_region

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Before every call of quirk_io_region(), pci_read_config_word() is called.
We can fold that call into quirk_io_region() to make code more readable.

[bhelgaas: changelog, fill bus_region directly rather than copying from res]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Yinghai Lu 2013-04-12 12:44:15 +00:00 committed by Bjorn Helgaas
parent 64b001758e
commit 65195c76a7
1 changed files with 45 additions and 85 deletions
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130
drivers/pci/quirks.c
View file

@ -324,29 +324,30 @@ static void quirk_cs5536_vsa(struct pci_dev *dev)
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
static void quirk_io_region(struct pci_dev *dev, unsigned region, static void quirk_io_region(struct pci_dev *dev, int port,
unsigned size, int nr, const char *name) unsigned size, int nr, const char *name)
{ {
region &= ~(size-1); u16 region;
if (region) { struct pci_bus_region bus_region;
struct pci_bus_region bus_region; struct resource *res = dev->resource + nr;
struct resource *res = dev->resource + nr;
res->name = pci_name(dev); pci_read_config_word(dev, port, &region);
res->start = region; region &= ~(size - 1);
res->end = region + size - 1;
res->flags = IORESOURCE_IO;
/* Convert from PCI bus to resource space. */ if (!region)
bus_region.start = res->start; return;
bus_region.end = res->end;
pcibios_bus_to_resource(dev, res, &bus_region);
if (pci_claim_resource(dev, nr) == 0) res->name = pci_name(dev);
dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res->flags = IORESOURCE_IO;
res, name);
} /* Convert from PCI bus to resource space */
} bus_region.start = region;
bus_region.end = region + size - 1;
pcibios_bus_to_resource(dev, res, &bus_region);
if (!pci_claim_resource(dev, nr))
dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
}
/* /*
* ATI Northbridge setups MCE the processor if you even * ATI Northbridge setups MCE the processor if you even
@ -374,12 +375,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS100, quirk_ati_
*/ */
static void quirk_ali7101_acpi(struct pci_dev *dev) static void quirk_ali7101_acpi(struct pci_dev *dev)
{ {
u16 region; quirk_io_region(dev, 0xE0, 64, PCI_BRIDGE_RESOURCES, "ali7101 ACPI");
quirk_io_region(dev, 0xE2, 32, PCI_BRIDGE_RESOURCES+1, "ali7101 SMB");
pci_read_config_word(dev, 0xE0, &region);
quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "ali7101 ACPI");
pci_read_config_word(dev, 0xE2, &region);
quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1, "ali7101 SMB");
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi);
@ -442,12 +439,10 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int
*/ */
static void quirk_piix4_acpi(struct pci_dev *dev) static void quirk_piix4_acpi(struct pci_dev *dev)
{ {
u32 region, res_a; u32 res_a;
pci_read_config_dword(dev, 0x40, &region); quirk_io_region(dev, 0x40, 64, PCI_BRIDGE_RESOURCES, "PIIX4 ACPI");
quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "PIIX4 ACPI"); quirk_io_region(dev, 0x90, 16, PCI_BRIDGE_RESOURCES+1, "PIIX4 SMB");
pci_read_config_dword(dev, 0x90, &region);
quirk_io_region(dev, region, 16, PCI_BRIDGE_RESOURCES+1, "PIIX4 SMB");
/* Device resource A has enables for some of the other ones */ /* Device resource A has enables for some of the other ones */
pci_read_config_dword(dev, 0x5c, &res_a); pci_read_config_dword(dev, 0x5c, &res_a);
@ -491,7 +486,6 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3, qui
*/ */
static void quirk_ich4_lpc_acpi(struct pci_dev *dev) static void quirk_ich4_lpc_acpi(struct pci_dev *dev)
{ {
u32 region;
u8 enable; u8 enable;
/* /*
@ -503,22 +497,14 @@ static void quirk_ich4_lpc_acpi(struct pci_dev *dev)
*/ */
pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable); pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
if (enable & ICH4_ACPI_EN) { if (enable & ICH4_ACPI_EN)
pci_read_config_dword(dev, ICH_PMBASE, &region); quirk_io_region(dev, ICH_PMBASE, 128, PCI_BRIDGE_RESOURCES,
region &= PCI_BASE_ADDRESS_IO_MASK; "ICH4 ACPI/GPIO/TCO");
if (region >= PCIBIOS_MIN_IO)
quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
"ICH4 ACPI/GPIO/TCO");
}
pci_read_config_byte(dev, ICH4_GPIO_CNTL, &enable); pci_read_config_byte(dev, ICH4_GPIO_CNTL, &enable);
if (enable & ICH4_GPIO_EN) { if (enable & ICH4_GPIO_EN)
pci_read_config_dword(dev, ICH4_GPIOBASE, &region); quirk_io_region(dev, ICH4_GPIOBASE, 64, PCI_BRIDGE_RESOURCES+1,
region &= PCI_BASE_ADDRESS_IO_MASK; "ICH4 GPIO");
if (region >= PCIBIOS_MIN_IO)
quirk_io_region(dev, region, 64,
PCI_BRIDGE_RESOURCES + 1, "ICH4 GPIO");
}
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi);
@ -533,26 +519,17 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, qui
static void ich6_lpc_acpi_gpio(struct pci_dev *dev) static void ich6_lpc_acpi_gpio(struct pci_dev *dev)
{ {
u32 region;
u8 enable; u8 enable;
pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable); pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
if (enable & ICH6_ACPI_EN) { if (enable & ICH6_ACPI_EN)
pci_read_config_dword(dev, ICH_PMBASE, &region); quirk_io_region(dev, ICH_PMBASE, 128, PCI_BRIDGE_RESOURCES,
region &= PCI_BASE_ADDRESS_IO_MASK; "ICH6 ACPI/GPIO/TCO");
if (region >= PCIBIOS_MIN_IO)
quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
"ICH6 ACPI/GPIO/TCO");
}
pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable); pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable);
if (enable & ICH6_GPIO_EN) { if (enable & ICH6_GPIO_EN)
pci_read_config_dword(dev, ICH6_GPIOBASE, &region); quirk_io_region(dev, ICH6_GPIOBASE, 64, PCI_BRIDGE_RESOURCES+1,
region &= PCI_BASE_ADDRESS_IO_MASK; "ICH6 GPIO");
if (region >= PCIBIOS_MIN_IO)
quirk_io_region(dev, region, 64,
PCI_BRIDGE_RESOURCES + 1, "ICH6 GPIO");
}
} }
static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg, const char *name, int dynsize) static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg, const char *name, int dynsize)
@ -650,13 +627,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_1, qui
*/ */
static void quirk_vt82c586_acpi(struct pci_dev *dev) static void quirk_vt82c586_acpi(struct pci_dev *dev)
{ {
u32 region; if (dev->revision & 0x10)
quirk_io_region(dev, 0x48, 256, PCI_BRIDGE_RESOURCES,
if (dev->revision & 0x10) { "vt82c586 ACPI");
pci_read_config_dword(dev, 0x48, &region);
region &= PCI_BASE_ADDRESS_IO_MASK;
quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI");
}
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi);
@ -668,18 +641,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt
*/ */
static void quirk_vt82c686_acpi(struct pci_dev *dev) static void quirk_vt82c686_acpi(struct pci_dev *dev)
{ {
u16 hm;
u32 smb;
quirk_vt82c586_acpi(dev); quirk_vt82c586_acpi(dev);
pci_read_config_word(dev, 0x70, &hm); quirk_io_region(dev, 0x70, 128, PCI_BRIDGE_RESOURCES+1,
hm &= PCI_BASE_ADDRESS_IO_MASK; "vt82c686 HW-mon");
quirk_io_region(dev, hm, 128, PCI_BRIDGE_RESOURCES + 1, "vt82c686 HW-mon");
pci_read_config_dword(dev, 0x90, &smb); quirk_io_region(dev, 0x90, 16, PCI_BRIDGE_RESOURCES+2, "vt82c686 SMB");
smb &= PCI_BASE_ADDRESS_IO_MASK;
quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2, "vt82c686 SMB");
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi);
@ -690,15 +657,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt
*/ */
static void quirk_vt8235_acpi(struct pci_dev *dev) static void quirk_vt8235_acpi(struct pci_dev *dev)
{ {
u16 pm, smb; quirk_io_region(dev, 0x88, 128, PCI_BRIDGE_RESOURCES, "vt8235 PM");
quirk_io_region(dev, 0xd0, 16, PCI_BRIDGE_RESOURCES+1, "vt8235 SMB");
pci_read_config_word(dev, 0x88, &pm);
pm &= PCI_BASE_ADDRESS_IO_MASK;
quirk_io_region(dev, pm, 128, PCI_BRIDGE_RESOURCES, "vt8235 PM");
pci_read_config_word(dev, 0xd0, &smb);
smb &= PCI_BASE_ADDRESS_IO_MASK;
quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 1, "vt8235 SMB");
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);