ata fixes for 6.2-rc8
Three small fixes for 6.2 final: * Disable READ LOG DMA EXT for Samsung MZ7LH drives as these drives choke on that command, from Patrick. * Add Intel Tiger Lake UP{3,4} to the list of supported AHCI controllers (this is not technically a bug fix, but it is trivial enough that I add it here), from SImon. * Fix code comments in the pata_octeon_cf driver as incorrect formatting was causing warnings from kernel-doc, from Randy. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQSRPv8tYSvhwAzJdzjdoc3SxdoYdgUCY+9ZvwAKCRDdoc3SxdoY dtNIAQCTDJCUVZViAEIf/ntjAJSyjCw7SCkinOKHPpC40QpQ8wD/eRsuq4LfZY6H rrFfRxuO7hgviGUTFuAbP7mNMMI05gw= =lvfh -----END PGP SIGNATURE----- Merge tag 'ata-6.2-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata Pull ata fixes from Damien Le Moal: "Three small fixes for 6.2 final: - Disable READ LOG DMA EXT for Samsung MZ7LH drives as these drives choke on that command, from Patrick. - Add Intel Tiger Lake UP{3,4} to the list of supported AHCI controllers (this is not technically a bug fix, but it is trivial enough that I add it here), from Simon. - Fix code comments in the pata_octeon_cf driver as incorrect formatting was causing warnings from kernel-doc, from Randy" * tag 'ata-6.2-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata: ata: pata_octeon_cf: drop kernel-doc notation ata: ahci: Add Tiger Lake UP{3,4} AHCI controller ata: libata-core: Disable READ LOG DMA EXT for Samsung MZ7LH
This commit is contained in:
commit
6d2e62e162
3 changed files with 12 additions and 8 deletions
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@ -421,6 +421,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */
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{ PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */
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{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */
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{ PCI_VDEVICE(INTEL, 0xa0d3), board_ahci_low_power }, /* Tiger Lake UP{3,4} AHCI */
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/* JMicron 360/1/3/5/6, match class to avoid IDE function */
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{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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@ -4045,6 +4045,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
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{ "Samsung SSD 870*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
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ATA_HORKAGE_ZERO_AFTER_TRIM |
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ATA_HORKAGE_NO_NCQ_ON_ATI },
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{ "SAMSUNG*MZ7LH*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
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ATA_HORKAGE_ZERO_AFTER_TRIM |
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ATA_HORKAGE_NO_NCQ_ON_ATI, },
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{ "FCCT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
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ATA_HORKAGE_ZERO_AFTER_TRIM },
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@ -67,7 +67,7 @@ module_param(enable_dma, int, 0444);
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MODULE_PARM_DESC(enable_dma,
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"Enable use of DMA on interfaces that support it (0=no dma [default], 1=use dma)");
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/**
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/*
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* Convert nanosecond based time to setting used in the
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* boot bus timing register, based on timing multiple
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*/
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@ -114,7 +114,7 @@ static void octeon_cf_set_boot_reg_cfg(int cs, unsigned int multiplier)
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cvmx_write_csr(CVMX_MIO_BOOT_REG_CFGX(cs), reg_cfg.u64);
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}
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/**
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/*
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* Called after libata determines the needed PIO mode. This
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* function programs the Octeon bootbus regions to support the
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* timing requirements of the PIO mode.
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@ -278,7 +278,7 @@ static void octeon_cf_set_dmamode(struct ata_port *ap, struct ata_device *dev)
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cvmx_write_csr(cf_port->dma_base + DMA_TIM, dma_tim.u64);
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}
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/**
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/*
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* Handle an 8 bit I/O request.
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*
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* @qc: Queued command
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@ -317,7 +317,7 @@ static unsigned int octeon_cf_data_xfer8(struct ata_queued_cmd *qc,
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return buflen;
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}
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/**
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/*
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* Handle a 16 bit I/O request.
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*
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* @qc: Queued command
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@ -372,7 +372,7 @@ static unsigned int octeon_cf_data_xfer16(struct ata_queued_cmd *qc,
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return buflen;
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}
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/**
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/*
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* Read the taskfile for 16bit non-True IDE only.
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*/
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static void octeon_cf_tf_read16(struct ata_port *ap, struct ata_taskfile *tf)
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@ -453,7 +453,7 @@ static int octeon_cf_softreset16(struct ata_link *link, unsigned int *classes,
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return 0;
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}
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/**
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/*
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* Load the taskfile for 16bit non-True IDE only. The device_addr is
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* not loaded, we do this as part of octeon_cf_exec_command16.
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*/
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@ -525,7 +525,7 @@ static void octeon_cf_dma_setup(struct ata_queued_cmd *qc)
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ap->ops->sff_exec_command(ap, &qc->tf);
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}
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/**
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/*
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* Start a DMA transfer that was already setup
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*
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* @qc: Information about the DMA
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@ -580,7 +580,7 @@ static void octeon_cf_dma_start(struct ata_queued_cmd *qc)
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cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64);
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}
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/**
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/*
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*
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* LOCKING:
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* spin_lock_irqsave(host lock)
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