arm64: Xilinx SoC changes for 6.11
Timer - Fix u32 overflow issue in 32-bit width PWM mode. Event manager: - rename cpu_number1 to dummy_cpu_number Power: - Add cb event for subsystem restart - check return status of get_api_version() Firmware: - Move FIRMWARE_VERSION_MASK to xlnx-zynqmp.h -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZnrFgQAKCRDKSWXLKUoM IVNmAKCQ55ixxl264CwDePSngwKjGOERuQCggRhBvLHuml1mO9ia+U0ydmNMWyQ= =TT/N -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaNPMkACgkQYKtH/8kJ UicZfw/+PXtCsboxekVeZOrQi+cE61xlYw/vpN9mq6mOeEfA0c0hk0o+K89YwHkv wkNSCCh+KPiIFB+j/P8Nheef1E/IhCKwDvrdNSB3ZVvPfzv/Ixae4N9Y6hQdMCFN xmc9k/xTMRwRRkdydG5Q8W+QVBoy4scvLk7xQQHQiVyoZ0froyhFVpz7UteoYnti fbnvaCClKnfmVXkOvWh9Zb7C+4lHvX625yZFh2Vsenx/iBEJ3TJiYmUNw9VGPl0h 8kQu5m7jli7ogpMCSUvtcc54jqcPH2vuT8o03e3N6jAyoWn4IJDRxwg6I4glB+Lk P1Y6xGomfX8gDTtci2cUbcC0jjpPKFNTw7U8uJu/TIf2AcvWI+iXN3kHehO3AkUM z7RPMLkR4jgfa8XcxqpzX86VKiOEkDPBkm96aq7YlLAYfSgTNOq9wfhE+VfSf7q1 nnTQdXHtBu8Umh3dt2m8KpT28U3KaIgY2AGxy6jlm51SZbC9kJhzADx2U6p+8tyL Hf3V+lAaQVxRBrc2v1nYVZ5LDmT3pSs2jZb2Tnlv6FrOXOZo1GeVYZTX4Aub/tkv kuTAPJPMYwN0ghczijC8ddXmiBdhEW8rww3JROFQKtg/oQ3HEIG2rJiKr4m/3pgb iUhNXzoXs8XLUSjqDJ0r7VHDl8GtGNpdsD8qO4nv/roDq04anvA= =FltB -----END PGP SIGNATURE----- Merge tag 'zynqmp-soc2-for-6.11' of https://github.com/Xilinx/linux-xlnx into soc/drivers arm64: Xilinx SoC changes for 6.11 Timer - Fix u32 overflow issue in 32-bit width PWM mode. Event manager: - rename cpu_number1 to dummy_cpu_number Power: - Add cb event for subsystem restart - check return status of get_api_version() Firmware: - Move FIRMWARE_VERSION_MASK to xlnx-zynqmp.h * tag 'zynqmp-soc2-for-6.11' of https://github.com/Xilinx/linux-xlnx: drivers: soc: xilinx: check return status of get_api_version() firmware: xilinx: Move FIRMWARE_VERSION_MASK to xlnx-zynqmp.h soc: xilinx: Add cb event for subsystem restart soc: xilinx: rename cpu_number1 to dummy_cpu_number pwm: xilinx: Fix u32 overflow issue in 32-bit width PWM mode. Link: https://lore.kernel.org/r/CAHTX3dKMtqgNpkEvrw0p2w+SPN83Ai1_kzhefUGOO5rMkPaH_w@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
782b726201
6 changed files with 152 additions and 37 deletions
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@ -41,9 +41,6 @@
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/* IOCTL/QUERY feature payload size */
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#define FEATURE_PAYLOAD_SIZE 2
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/* Firmware feature check version mask */
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#define FIRMWARE_VERSION_MASK GENMASK(15, 0)
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static bool feature_check_enabled;
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static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
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static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
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@ -3,6 +3,7 @@
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* Xilinx Event Management Driver
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*
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* Copyright (C) 2021 Xilinx, Inc.
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* Copyright (C) 2024 Advanced Micro Devices, Inc.
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*
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* Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
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*/
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@ -19,7 +20,7 @@
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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static DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number1);
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static DEFINE_PER_CPU_READ_MOSTLY(int, dummy_cpu_number);
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static int virq_sgi;
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static int event_manager_availability = -EACCES;
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@ -35,7 +36,6 @@ static int event_manager_availability = -EACCES;
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#define MAX_BITS (32U) /* Number of bits available for error mask */
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#define FIRMWARE_VERSION_MASK (0xFFFFU)
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#define REGISTER_NOTIFIER_FIRMWARE_VERSION (2U)
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static DEFINE_HASHTABLE(reg_driver_map, REGISTERED_DRIVER_MAX_ORDER);
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@ -570,7 +570,6 @@ static void xlnx_disable_percpu_irq(void *data)
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static int xlnx_event_init_sgi(struct platform_device *pdev)
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{
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int ret = 0;
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int cpu;
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/*
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* IRQ related structures are used for the following:
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* for each SGI interrupt ensure its mapped by GIC IRQ domain
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@ -607,11 +606,8 @@ static int xlnx_event_init_sgi(struct platform_device *pdev)
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sgi_fwspec.param[0] = sgi_num;
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virq_sgi = irq_create_fwspec_mapping(&sgi_fwspec);
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cpu = get_cpu();
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per_cpu(cpu_number1, cpu) = cpu;
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ret = request_percpu_irq(virq_sgi, xlnx_event_handler, "xlnx_event_mgmt",
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&cpu_number1);
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put_cpu();
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&dummy_cpu_number);
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WARN_ON(ret);
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if (ret) {
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@ -627,16 +623,12 @@ static int xlnx_event_init_sgi(struct platform_device *pdev)
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static void xlnx_event_cleanup_sgi(struct platform_device *pdev)
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{
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int cpu = smp_processor_id();
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per_cpu(cpu_number1, cpu) = cpu;
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cpuhp_remove_state(CPUHP_AP_ONLINE_DYN);
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on_each_cpu(xlnx_disable_percpu_irq, NULL, 1);
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irq_clear_status_flags(virq_sgi, IRQ_PER_CPU);
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free_percpu_irq(virq_sgi, &cpu_number1);
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free_percpu_irq(virq_sgi, &dummy_cpu_number);
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irq_dispose_mapping(virq_sgi);
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}
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@ -30,9 +30,27 @@ struct zynqmp_pm_work_struct {
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u32 args[CB_ARG_CNT];
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};
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static struct zynqmp_pm_work_struct *zynqmp_pm_init_suspend_work;
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/**
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* struct zynqmp_pm_event_info - event related information
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* @cb_fun: Function pointer to store the callback function.
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* @cb_type: Type of callback from pm_api_cb_id,
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* PM_NOTIFY_CB - for Error Events,
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* PM_INIT_SUSPEND_CB - for suspend callback.
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* @node_id: Node-Id related to event.
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* @event: Event Mask for the Error Event.
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* @wake: Flag specifying whether the subsystem should be woken upon
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* event notification.
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*/
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struct zynqmp_pm_event_info {
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event_cb_func_t cb_fun;
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enum pm_api_cb_id cb_type;
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u32 node_id;
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u32 event;
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bool wake;
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};
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static struct zynqmp_pm_work_struct *zynqmp_pm_init_suspend_work, *zynqmp_pm_init_restart_work;
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static struct mbox_chan *rx_chan;
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static bool event_registered;
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enum pm_suspend_mode {
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PM_SUSPEND_MODE_FIRST = 0,
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@ -54,6 +72,19 @@ static void zynqmp_pm_get_callback_data(u32 *buf)
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zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, buf, 0);
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}
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static void subsystem_restart_event_callback(const u32 *payload, void *data)
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{
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/* First element is callback API ID, others are callback arguments */
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if (work_pending(&zynqmp_pm_init_restart_work->callback_work))
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return;
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/* Copy callback arguments into work's structure */
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memcpy(zynqmp_pm_init_restart_work->args, &payload[0],
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sizeof(zynqmp_pm_init_restart_work->args));
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queue_work(system_unbound_wq, &zynqmp_pm_init_restart_work->callback_work);
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}
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static void suspend_event_callback(const u32 *payload, void *data)
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{
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/* First element is callback API ID, others are callback arguments */
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@ -119,6 +150,37 @@ static void ipi_receive_callback(struct mbox_client *cl, void *data)
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}
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}
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/**
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* zynqmp_pm_subsystem_restart_work_fn - Initiate Subsystem restart
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* @work: Pointer to work_struct
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*
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* Bottom-half of PM callback IRQ handler.
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*/
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static void zynqmp_pm_subsystem_restart_work_fn(struct work_struct *work)
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{
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int ret;
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struct zynqmp_pm_work_struct *pm_work = container_of(work, struct zynqmp_pm_work_struct,
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callback_work);
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/* First element is callback API ID, others are callback arguments */
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if (pm_work->args[0] == PM_NOTIFY_CB) {
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if (pm_work->args[2] == EVENT_SUBSYSTEM_RESTART) {
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ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
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ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM);
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if (ret) {
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pr_err("unable to set shutdown scope\n");
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return;
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}
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kernel_restart(NULL);
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} else {
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pr_err("%s Unsupported Event - %d\n", __func__, pm_work->args[2]);
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}
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} else {
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pr_err("%s() Unsupported Callback %d\n", __func__, pm_work->args[0]);
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}
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}
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/**
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* zynqmp_pm_init_suspend_work_fn - Initialize suspend
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* @work: Pointer to work_struct
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@ -184,13 +246,51 @@ static ssize_t suspend_mode_store(struct device *dev,
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static DEVICE_ATTR_RW(suspend_mode);
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static void unregister_event(struct device *dev, void *res)
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{
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struct zynqmp_pm_event_info *event_info = res;
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xlnx_unregister_event(event_info->cb_type, event_info->node_id,
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event_info->event, event_info->cb_fun, NULL);
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}
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static int register_event(struct device *dev, const enum pm_api_cb_id cb_type, const u32 node_id,
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const u32 event, const bool wake, event_cb_func_t cb_fun)
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{
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int ret;
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struct zynqmp_pm_event_info *event_info;
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event_info = devres_alloc(unregister_event, sizeof(struct zynqmp_pm_event_info),
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GFP_KERNEL);
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if (!event_info)
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return -ENOMEM;
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event_info->cb_type = cb_type;
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event_info->node_id = node_id;
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event_info->event = event;
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event_info->wake = wake;
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event_info->cb_fun = cb_fun;
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ret = xlnx_register_event(event_info->cb_type, event_info->node_id,
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event_info->event, event_info->wake, event_info->cb_fun, NULL);
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if (ret) {
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devres_free(event_info);
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return ret;
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}
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devres_add(dev, event_info);
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return 0;
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}
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static int zynqmp_pm_probe(struct platform_device *pdev)
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{
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int ret, irq;
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u32 pm_api_version;
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u32 pm_api_version, pm_family_code, pm_sub_family_code, node_id;
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struct mbox_client *client;
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zynqmp_pm_get_api_version(&pm_api_version);
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ret = zynqmp_pm_get_api_version(&pm_api_version);
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if (ret)
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return ret;
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/* Check PM API version number */
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if (pm_api_version < ZYNQMP_PM_VERSION)
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* is not available to use) or -ENODEV(Xilinx Event Manager not compiled),
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* then use ipi-mailbox or interrupt method.
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*/
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ret = xlnx_register_event(PM_INIT_SUSPEND_CB, 0, 0, false,
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suspend_event_callback, NULL);
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ret = register_event(&pdev->dev, PM_INIT_SUSPEND_CB, 0, 0, false,
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suspend_event_callback);
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if (!ret) {
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zynqmp_pm_init_suspend_work = devm_kzalloc(&pdev->dev,
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sizeof(struct zynqmp_pm_work_struct),
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GFP_KERNEL);
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if (!zynqmp_pm_init_suspend_work) {
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xlnx_unregister_event(PM_INIT_SUSPEND_CB, 0, 0,
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suspend_event_callback, NULL);
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if (!zynqmp_pm_init_suspend_work)
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return -ENOMEM;
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}
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event_registered = true;
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INIT_WORK(&zynqmp_pm_init_suspend_work->callback_work,
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zynqmp_pm_init_suspend_work_fn);
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ret = zynqmp_pm_get_family_info(&pm_family_code, &pm_sub_family_code);
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if (ret < 0)
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return ret;
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if (pm_sub_family_code == VERSALNET_SUB_FAMILY_CODE)
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node_id = PM_DEV_ACPU_0_0;
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else
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node_id = PM_DEV_ACPU_0;
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ret = register_event(&pdev->dev, PM_NOTIFY_CB, node_id, EVENT_SUBSYSTEM_RESTART,
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false, subsystem_restart_event_callback);
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if (ret) {
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dev_err(&pdev->dev, "Failed to Register with Xilinx Event manager %d\n",
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ret);
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return ret;
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}
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zynqmp_pm_init_restart_work = devm_kzalloc(&pdev->dev,
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sizeof(struct zynqmp_pm_work_struct),
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GFP_KERNEL);
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if (!zynqmp_pm_init_restart_work)
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return -ENOMEM;
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INIT_WORK(&zynqmp_pm_init_restart_work->callback_work,
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zynqmp_pm_subsystem_restart_work_fn);
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} else if (ret != -EACCES && ret != -ENODEV) {
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dev_err(&pdev->dev, "Failed to Register with Xilinx Event manager %d\n", ret);
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return ret;
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}
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ret = sysfs_create_file(&pdev->dev.kobj, &dev_attr_suspend_mode.attr);
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if (ret) {
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if (event_registered) {
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xlnx_unregister_event(PM_INIT_SUSPEND_CB, 0, 0, suspend_event_callback,
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NULL);
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event_registered = false;
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}
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dev_err(&pdev->dev, "unable to create sysfs interface\n");
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if (ret)
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return ret;
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}
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return 0;
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}
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@ -280,8 +395,6 @@ static int zynqmp_pm_probe(struct platform_device *pdev)
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static void zynqmp_pm_remove(struct platform_device *pdev)
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{
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sysfs_remove_file(&pdev->dev.kobj, &dev_attr_suspend_mode.attr);
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if (event_registered)
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xlnx_unregister_event(PM_INIT_SUSPEND_CB, 0, 0, suspend_event_callback, NULL);
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if (!rx_chan)
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mbox_free_channel(rx_chan);
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@ -41,7 +41,7 @@ struct regmap;
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struct xilinx_timer_priv {
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struct regmap *map;
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struct clk *clk;
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u32 max;
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u64 max;
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};
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/**
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@ -1,4 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Xilinx Event Management Driver
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*
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* Copyright (C) 2024, Advanced Micro Devices, Inc.
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*/
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#ifndef _FIRMWARE_XLNX_EVENT_MANAGER_H_
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#define _FIRMWARE_XLNX_EVENT_MANAGER_H_
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@ -7,6 +12,11 @@
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#define CB_MAX_PAYLOAD_SIZE (4U) /*In payload maximum 32bytes */
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#define EVENT_SUBSYSTEM_RESTART (4U)
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#define PM_DEV_ACPU_0_0 (0x1810c0afU)
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#define PM_DEV_ACPU_0 (0x1810c003U)
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/************************** Exported Function *****************************/
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typedef void (*event_cb_func_t)(const u32 *payload, void *data);
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@ -52,6 +52,9 @@
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#define API_ID_MASK GENMASK(7, 0)
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#define MODULE_ID_MASK GENMASK(11, 8)
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/* Firmware feature check version mask */
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#define FIRMWARE_VERSION_MASK 0xFFFFU
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/* ATF only commands */
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#define TF_A_PM_REGISTER_SGI 0xa04
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#define PM_GET_TRUSTZONE_VERSION 0xa03
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