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ARM: 6027/1: ux500: enable l2x0 support

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This enables the l2x0 support and ensures that the secondary
CPU can see the page table and secondary data at this point.

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Srinidhi Kasagar 2010-04-03 19:10:45 +01:00 committed by Russell King
parent b102c01fae
commit 8e797a7e4f
3 changed files with 21 additions and 2 deletions
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17
arch/arm/mach-ux500/cpu-u8500.c
View file

@ -20,6 +20,7 @@
#include <asm/localtimer.h>
#include <asm/hardware/gic.h>
#include <asm/mach/map.h>
#include <asm/hardware/cache-l2x0.h>
#include <plat/mtu.h>
#include <mach/hardware.h>
#include <mach/setup.h>
@ -127,6 +128,7 @@ static struct map_desc u8500_io_desc[] __initdata = {
__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
__IO_DEV_DESC(U8500_GPIO5_BASE, SZ_4K),
__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
};
static struct map_desc u8500ed_io_desc[] __initdata = {
@ -183,3 +185,18 @@ static void __init u8500_timer_init(void)
struct sys_timer u8500_timer = {
.init = u8500_timer_init,
};
#ifdef CONFIG_CACHE_L2X0
static int u8500_l2x0_init(void)
{
void __iomem *l2x0_base;
l2x0_base = __io_address(U8500_L2CC_BASE);
/* 64KB way size, 8 way associativity, force WA */
l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
return 0;
}
early_initcall(u8500_l2x0_init);
#endif

3
arch/arm/mach-ux500/platsmp.c
View file

@ -75,7 +75,8 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
* that it has been released by resetting pen_release.
*/
pen_release = cpu;
flush_cache_all();
__cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
outer_clean_range(__pa(&pen_release), __pa(&pen_release) + 1);
timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) {

3
arch/arm/mm/Kconfig
View file

@ -754,7 +754,8 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
config CACHE_L2X0
bool "Enable the L2x0 outer cache controller"
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_U8500
default y
select OUTER_CACHE
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