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clk: cs2000-cp: Make aux output function controllable

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The aux output pin can be configured to output either of the two clock
inputs, the generated clock or the pll lock status. Allow access to
this feature through a new optional device-tree property.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Link: https://lore.kernel.org/r/20220125093336.226787-6-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Daniel Mack 2022-01-25 10:33:32 +01:00 committed by Stephen Boyd
parent 519ba32e34
commit a6e11bb24e
1 changed files with 9 additions and 0 deletions
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9
drivers/clk/clk-cs2000-cp.c
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@ -39,6 +39,8 @@
/* DEVICE_CFG1 */
#define RSEL(x) (((x) & 0x3) << 3)
#define RSEL_MASK RSEL(0x3)
#define AUXOUTSRC(x) (((x) & 0x3) << 1)
#define AUXOUTSRC_MASK AUXOUTSRC(0x3)
#define ENDEV1 (0x1)
/* DEVICE_CFG2 */
@ -421,12 +423,19 @@ static int cs2000_clk_register(struct cs2000_priv *priv)
struct clk_init_data init;
const char *name = np->name;
static const char *parent_names[CLK_MAX];
u32 aux_out = 0;
int ch = 0; /* it uses ch0 only at this point */
int rate;
int ret;
of_property_read_string(np, "clock-output-names", &name);
of_property_read_u32(np, "cirrus,aux-output-source", &aux_out);
ret = cs2000_bset(priv, DEVICE_CFG1,
AUXOUTSRC_MASK, AUXOUTSRC(aux_out));
if (ret < 0)
return ret;
/*
* set default rate as 1/1.
* otherwise .set_rate which setup ratio