unimore/kernel-hacking-2024-linux-steffo
unimore/kernel-hacking-2024-linux-steffo
1
Fork 0
Code Pull requests 5 Wiki Activity

mvebu fixes for v3.18

Browse source 
- Armada XP
     - Generalize i2c quirk
 
  - orion
     - Fix irq storm caused by specific sequence of request_irq
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJUVVu8AAoJEP45WPkGe8Zn31YQAJUE6cuk/brSae4s8tjIKWYP
 N45wwa2WSMOUscYIThlrfWn9M+KASU/X6dq/y9m7cJZs8mz87qpLV65zMZwnS44x
 clQ5gCE6ntGvnnRDQkidQ524/eKVbcJCUtZFRb9I/wqITvev/puhabLLLbs+5SL5
 5rqZsY831N5E0B2/eF9j+knUlzQoaK0xjMA3MAULC/KA1qb7p4vjwdl8SP/V4iqa
 GC7FERy7dFvGvBiL2FqnrCoFsdzltfIhE5C+XUj7BKdvZSYPaO0eP+UoXDmL7FMv
 EVqDcCtSG2Mp2+fSPWAChZoHO11Lo6zjX3HzCgLXyaNIpBD4BoaJO8W0oyiBkzYj
 OQX0Wm7WDzcOQlueRA5AKihSHOu28LQ+De7ashneRv5ZPkBzmr5Kgjg9C/+WbguS
 JpCfhBDwPizbri4LcJnBb6x8BSnEdIfYbqW/DIpmLbN7I/rb2dH+AeNwPgJfQPCz
 GUrU/foPnDSgo3C2fQq/5/1GxnnzHQwQUJNjI6Kb92GeFdurteSJyvRkalsbiuXN
 MljwnVZCNuggcloqYLD5MLzEa3I5PIlg1f7TfgfKd8yVvJ5jXfDgwD0k1Bxy6DhY
 ZiXXjTCVsr+a1P02LV5HtMGG6hd7iJx3aaABBWNaMypS5qtuiH5m7rJ7MG2Mtpbq
 6D6Kh+7DVw0EfKGUJPPv
 =JCsp
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-fixes-3.18' of git://git.infradead.org/linux-mvebu into fixes

Merge "mvebu fixes for v3.18" from Jason Cooper:

 - Armada XP
    - Generalize i2c quirk

 - orion
    - Fix irq storm caused by specific sequence of request_irq

* tag 'mvebu-fixes-3.18' of git://git.infradead.org/linux-mvebu:
  ARM: orion: Fix for certain sequence of request_irq can cause irq storm
  ARM: mvebu: armada xp: Generalize use of i2c quirk
This commit is contained in:
Olof Johansson 2014-11-16 15:07:37 -08:00
commit ae8f5041a5
2 changed files with 33 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/mach-mvebu/board-v7.c
View file

@ -188,7 +188,7 @@ static void __init thermal_quirk(void)
static void __init mvebu_dt_init(void)
{
if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
if (of_machine_is_compatible("marvell,armadaxp"))
i2c_quirk();
if (of_machine_is_compatible("marvell,a375-db")) {
external_abort_quirk();

36
arch/arm/plat-orion/gpio.c
View file

@ -497,6 +497,34 @@ static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
#define orion_gpio_dbg_show NULL
#endif
static void orion_gpio_unmask_irq(struct irq_data *d)
{
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
struct irq_chip_type *ct = irq_data_get_chip_type(d);
u32 reg_val;
u32 mask = d->mask;
irq_gc_lock(gc);
reg_val = irq_reg_readl(gc->reg_base + ct->regs.mask);
reg_val |= mask;
irq_reg_writel(reg_val, gc->reg_base + ct->regs.mask);
irq_gc_unlock(gc);
}
static void orion_gpio_mask_irq(struct irq_data *d)
{
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
struct irq_chip_type *ct = irq_data_get_chip_type(d);
u32 mask = d->mask;
u32 reg_val;
irq_gc_lock(gc);
reg_val = irq_reg_readl(gc->reg_base + ct->regs.mask);
reg_val &= ~mask;
irq_reg_writel(reg_val, gc->reg_base + ct->regs.mask);
irq_gc_unlock(gc);
}
void __init orion_gpio_init(struct device_node *np,
int gpio_base, int ngpio,
void __iomem *base, int mask_offset,
@ -565,8 +593,8 @@ void __init orion_gpio_init(struct device_node *np,
ct = gc->chip_types;
ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF;
ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW;
ct->chip.irq_mask = irq_gc_mask_clr_bit;
ct->chip.irq_unmask = irq_gc_mask_set_bit;
ct->chip.irq_mask = orion_gpio_mask_irq;
ct->chip.irq_unmask = orion_gpio_unmask_irq;
ct->chip.irq_set_type = gpio_irq_set_type;
ct->chip.name = ochip->chip.label;
@ -575,8 +603,8 @@ void __init orion_gpio_init(struct device_node *np,
ct->regs.ack = GPIO_EDGE_CAUSE_OFF;
ct->type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
ct->chip.irq_ack = irq_gc_ack_clr_bit;
ct->chip.irq_mask = irq_gc_mask_clr_bit;
ct->chip.irq_unmask = irq_gc_mask_set_bit;
ct->chip.irq_mask = orion_gpio_mask_irq;
ct->chip.irq_unmask = orion_gpio_unmask_irq;
ct->chip.irq_set_type = gpio_irq_set_type;
ct->handler = handle_edge_irq;
ct->chip.name = ochip->chip.label;