scsi: ufs: Prepare to add HCI capabilities sysfs
Prepare so we'll be able to read various other HCI registers. While at it, fix the HCPID & HCMID register names to stand for what they really are. Also replace the pm_runtime_{get/put}_sync() calls in auto_hibern8_show to ufshcd_rpm_{get/put}_sync() as any host controller register reads should. Reviewed-by: Keoseong Park <keosung.park@samsung.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Avri Altman <avri.altman@wdc.com> Link: https://lore.kernel.org/r/20240811143757.2538212-2-avri.altman@wdc.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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2 changed files with 25 additions and 18 deletions
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@ -198,6 +198,24 @@ static u32 ufshcd_us_to_ahit(unsigned int timer)
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FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, scale);
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}
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static int ufshcd_read_hci_reg(struct ufs_hba *hba, u32 *val, unsigned int reg)
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{
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down(&hba->host_sem);
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if (!ufshcd_is_user_access_allowed(hba)) {
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up(&hba->host_sem);
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return -EBUSY;
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}
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ufshcd_rpm_get_sync(hba);
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ufshcd_hold(hba);
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*val = ufshcd_readl(hba, reg);
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ufshcd_release(hba);
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ufshcd_rpm_put_sync(hba);
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up(&hba->host_sem);
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return 0;
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}
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static ssize_t auto_hibern8_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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@ -208,23 +226,11 @@ static ssize_t auto_hibern8_show(struct device *dev,
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if (!ufshcd_is_auto_hibern8_supported(hba))
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return -EOPNOTSUPP;
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down(&hba->host_sem);
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if (!ufshcd_is_user_access_allowed(hba)) {
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ret = -EBUSY;
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goto out;
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}
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ret = ufshcd_read_hci_reg(hba, &ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
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if (ret)
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return ret;
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pm_runtime_get_sync(hba->dev);
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ufshcd_hold(hba);
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ahit = ufshcd_readl(hba, REG_AUTO_HIBERNATE_IDLE_TIMER);
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ufshcd_release(hba);
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pm_runtime_put_sync(hba->dev);
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ret = sysfs_emit(buf, "%d\n", ufshcd_ahit_to_us(ahit));
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out:
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up(&hba->host_sem);
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return ret;
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return sysfs_emit(buf, "%d\n", ufshcd_ahit_to_us(ahit));
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}
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static ssize_t auto_hibern8_store(struct device *dev,
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@ -25,8 +25,9 @@ enum {
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REG_CONTROLLER_CAPABILITIES = 0x00,
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REG_MCQCAP = 0x04,
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REG_UFS_VERSION = 0x08,
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REG_CONTROLLER_DEV_ID = 0x10,
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REG_CONTROLLER_PROD_ID = 0x14,
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REG_EXT_CONTROLLER_CAPABILITIES = 0x0C,
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REG_CONTROLLER_PID = 0x10,
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REG_CONTROLLER_MID = 0x14,
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REG_AUTO_HIBERNATE_IDLE_TIMER = 0x18,
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REG_INTERRUPT_STATUS = 0x20,
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REG_INTERRUPT_ENABLE = 0x24,
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