drm/amdkfd: Fix CU occupancy for GFX 9.4.3
Make CU occupancy calculations work on GFX 9.4.3 by updating the logic to handle multiple XCCs correctly. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4 changed files with 29 additions and 11 deletions
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@ -963,14 +963,14 @@ static void get_wave_count(struct amdgpu_device *adev, int queue_idx,
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*/
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pipe_idx = queue_idx / adev->gfx.mec.num_queue_per_pipe;
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queue_slot = queue_idx % adev->gfx.mec.num_queue_per_pipe;
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soc15_grbm_select(adev, 1, pipe_idx, queue_slot, 0, inst);
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reg_val = RREG32_SOC15_IP(GC, SOC15_REG_OFFSET(GC, inst,
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soc15_grbm_select(adev, 1, pipe_idx, queue_slot, 0, GET_INST(GC, inst));
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reg_val = RREG32_SOC15_IP(GC, SOC15_REG_OFFSET(GC, GET_INST(GC, inst),
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mmSPI_CSQ_WF_ACTIVE_COUNT_0) + queue_slot);
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wave_cnt = reg_val & SPI_CSQ_WF_ACTIVE_COUNT_0__COUNT_MASK;
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if (wave_cnt != 0) {
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queue_cnt->wave_cnt += wave_cnt;
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queue_cnt->doorbell_off =
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(RREG32_SOC15(GC, inst, mmCP_HQD_PQ_DOORBELL_CONTROL) &
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(RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_DOORBELL_CONTROL) &
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CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK) >>
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CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT;
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}
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@ -1033,7 +1033,7 @@ void kgd_gfx_v9_get_cu_occupancy(struct amdgpu_device *adev,
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DECLARE_BITMAP(cp_queue_bitmap, AMDGPU_MAX_QUEUES);
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lock_spi_csq_mutexes(adev);
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soc15_grbm_select(adev, 1, 0, 0, 0, inst);
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soc15_grbm_select(adev, 1, 0, 0, 0, GET_INST(GC, inst));
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/*
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* Iterate through the shader engines and arrays of the device
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@ -1046,7 +1046,7 @@ void kgd_gfx_v9_get_cu_occupancy(struct amdgpu_device *adev,
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se_cnt = adev->gfx.config.max_shader_engines;
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for (se_idx = 0; se_idx < se_cnt; se_idx++) {
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amdgpu_gfx_select_se_sh(adev, se_idx, 0, 0xffffffff, inst);
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queue_map = RREG32_SOC15(GC, inst, mmSPI_CSQ_WF_ACTIVE_STATUS);
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queue_map = RREG32_SOC15(GC, GET_INST(GC, inst), mmSPI_CSQ_WF_ACTIVE_STATUS);
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/*
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* Assumption: queue map encodes following schema: four
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@ -1071,7 +1071,7 @@ void kgd_gfx_v9_get_cu_occupancy(struct amdgpu_device *adev,
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}
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amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff, inst);
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soc15_grbm_select(adev, 0, 0, 0, 0, inst);
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soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, inst));
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unlock_spi_csq_mutexes(adev);
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/* Update the output parameters and return */
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@ -3542,15 +3542,19 @@ int debug_refresh_runlist(struct device_queue_manager *dqm)
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bool kfd_dqm_is_queue_in_process(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd,
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int doorbell_off)
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int doorbell_off, u32 *queue_format)
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{
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struct queue *q;
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bool r = false;
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if (!queue_format)
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return r;
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dqm_lock(dqm);
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list_for_each_entry(q, &qpd->queues_list, list) {
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if (q->properties.doorbell_off == doorbell_off) {
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*queue_format = q->properties.format;
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r = true;
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goto out;
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}
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@ -326,7 +326,7 @@ int debug_map_and_unlock(struct device_queue_manager *dqm);
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int debug_refresh_runlist(struct device_queue_manager *dqm);
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bool kfd_dqm_is_queue_in_process(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd,
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int doorbell_off);
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int doorbell_off, u32 *queue_format);
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static inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
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{
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@ -272,6 +272,7 @@ static int kfd_get_cu_occupancy(struct attribute *attr, char *buffer)
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struct kfd_process_device *pdd = NULL;
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int i;
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struct kfd_cu_occupancy cu_occupancy[AMDGPU_MAX_QUEUES];
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u32 queue_format;
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memset(cu_occupancy, 0x0, sizeof(cu_occupancy));
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@ -292,14 +293,27 @@ static int kfd_get_cu_occupancy(struct attribute *attr, char *buffer)
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wave_cnt = 0;
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max_waves_per_cu = 0;
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/*
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* For GFX 9.4.3, fetch the CU occupancy from the first XCC in the partition.
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* For AQL queues, because of cooperative dispatch we multiply the wave count
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* by number of XCCs in the partition to get the total wave counts across all
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* XCCs in the partition.
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* For PM4 queues, there is no cooperative dispatch so wave_cnt stay as it is.
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*/
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dev->kfd2kgd->get_cu_occupancy(dev->adev, cu_occupancy,
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&max_waves_per_cu, 0);
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&max_waves_per_cu, ffs(dev->xcc_mask) - 1);
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for (i = 0; i < AMDGPU_MAX_QUEUES; i++) {
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if (cu_occupancy[i].wave_cnt != 0 &&
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kfd_dqm_is_queue_in_process(dev->dqm, &pdd->qpd,
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cu_occupancy[i].doorbell_off))
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wave_cnt += cu_occupancy[i].wave_cnt;
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cu_occupancy[i].doorbell_off,
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&queue_format)) {
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if (unlikely(queue_format == KFD_QUEUE_FORMAT_PM4))
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wave_cnt += cu_occupancy[i].wave_cnt;
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else
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wave_cnt += (NUM_XCC(dev->xcc_mask) *
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cu_occupancy[i].wave_cnt);
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}
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}
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/* Translate wave count to number of compute units */
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