Commit graph

46 commits

Author SHA1 Message Date
Manuel Lauss
b7f720d68c MIPS: Alchemy: Clean up GPIO registers and accessors
remove au_readl/au_writel, remove the predefined GPIO1/2 KSEG1 register
addresses and fix the fallout in all boards and drivers.

This also fixes a bug in the mtx-1_wdt driver which was introduced by
commit 6ea8115bb6
("Convert mtx1 wdt to be a platform device and use generic GPIO API")
before this patch mtx-1_wdt only modified GPIO215, the patch then
used the gpio resource information as bit index into the GPIO2 register
but the conversion to the GPIO API didn't realize that.
With this patch the drivers original behaviour is restored and GPIO15
is left alone.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: Florian Fainelli <florian@openwrt.org>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: linux-watchdog@vger.kernel.org
Cc: Wim Van Sebroeck <wim@iguana.be>
Patchwork: https://patchwork.linux-mips.org/patch/2381/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org
2011-05-19 09:55:46 +01:00
Manuel Lauss
5d4ddcb427 MIPS: Alchemy: Cleanup DMA addresses
According to the databooks, the Au1000 DMA engine must be programmed with
the physical FIFO addresses.  This patch does that; furthermore this
opened the possibility to get rid of a lot of now unnecessary address
defines.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Patchwork: https://patchwork.linux-mips.org/patch/2348/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org
2011-05-19 09:55:46 +01:00
Manuel Lauss
40d8bc2817 MIPS: Alchemy: Rewrite ethernet platform setup
Rewrite ethernet setup to use runtime cpu detection, and also clean up
the ethernet base address mess as far as possible.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Patchwork: https://patchwork.linux-mips.org/patch/2353/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org
2011-05-19 09:55:46 +01:00
Manuel Lauss
80130204b4 MIPS: Alchemy: Rewrite UART setup and constants.
Detect CPU type at runtime and setup uarts accordingly; also clean up the
uart base address mess in the process as far as possible.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Patchwork: https://patchwork.linux-mips.org/patch/2352/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org
2011-05-19 09:55:45 +01:00
Manuel Lauss
adcb86279f MIPS: Alchemy: Convert dbdma.c to syscore_ops
Convert the PM sysdev to syscore_ops and clean up the ddma addresses a bit.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Patchwork: https://patchwork.linux-mips.org/patch/2351/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:45 +01:00
Manuel Lauss
dca7587185 MIPS: Alchemy: irq code and constant cleanup
replace au_readl/au_writel with __raw_readl/__raw_writel,
and clean up IC-related stuff from the headers.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Patchwork: https://patchwork.linux-mips.org/patch/2354/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:45 +01:00
Manuel Lauss
c1e58a3129 MIPS: Alchemy: update inlinable GPIO API
This fixes a build failure with gpio_keys and CONFIG_GPIOLIB=n (mtx1):
  CC      drivers/input/keyboard/gpio_keys.o
gpio_keys.c: In function 'gpio_keys_report_event':
gpio_keys.c:325:2: error: implicit declaration of function 'gpio_get_value_cansleep'
gpio_keys.c: In function 'gpio_keys_setup_key':
gpio_keys.c:390:3: error: implicit declaration of function 'gpio_set_debounce'

Also add stubs for the other new functions.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Patchwork: https://patchwork.linux-mips.org/patch/2346/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:45 +01:00
Manuel Lauss
f66736532a MIPS: au1000_eth: Get ethernet address from platform_data
au1000_eth uses firmware calls to get a valid MAC address, and changes
it depending on platform device id.  This patch moves this logic out of
the driver into the platform device registration part, where boards with
supported chips can use whatever firmware interface they need; the default
implementation maintains compatibility with existing, YAMON-based firmware.

Tested-by: Wolfgang Grandegger <wg@denx.de>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1481/
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:09 +01:00
Manuel Lauss
2e93d1ec08 MIPS: Alchemy: sleepcode without compile-time cputype dependencies
Split the low-level sleepcode into per-cpu functions instead of
relying on compile-time-defined cpu type.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1281/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:30 +01:00
Manuel Lauss
96d660c482 MIPS: Alchemy: add sysdev for DBDMA PM.
Add a sysdev for DBDMA PM.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1119/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:15 +01:00
Manuel Lauss
0f0d85bcc3 MIPS: Alchemy: add sysdev for IRQ PM.
Use a sysdev to implement PM methods for the Au1000 interrupt controllers.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1114/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:15 +01:00
Manuel Lauss
11b897cf84 MIPS: Alchemy: use 36bit addresses for PCMCIA resources.
On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus
area.  Currently, addresses at the far end of the 32bit area are assumed
to belong to the PCMCIA area and fixed up to the real 36bit address before
being passed to ioremap().

A previous commit enabled 64 bit physical size for the resource datatype on
Alchemy and this allows to use the correct 36bit addresses when registering
the PCMCIA sockets.

This patch removes the 32-to-36bit address fixup and registers the Alchemy
demo board pcmcia socket with the correct 36bit physical addresses.

Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet
card.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/994/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:43 +01:00
Yoichi Yuasa
ae7cbef5e5 MIPS: Alchemy: Remove prom_getcmdline()
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/927/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:21 +01:00
Manuel Lauss
3b839070f1 MMC: AU1xMMC: Allow platforms to disable host capabilities
Although the hardware supports a 4/8bit SD interface and the driver
unconditionally advertises all hardware caps to the MMC core, not all
datalines may actually be wired up.  This patch introduces another
field to au1xmmc platform data allowing platforms to disable certain
advanced host controller features.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: linux-mmc@vger.kernel.org
CC: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/460/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:19 +01:00
pascal@pabr.org
60ec6571c5 MIPS: Support 36-bit iomem on 32-bit Au1x00
I believe these changes are needed on Alchemy SoCs in order to
use iomem above 4G with the usual platform_device machinery:

- Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit.
- Increase IOMEM_RESOURCE_END so that platforms can register resources.

To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/814/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:17 +01:00
Ralf Baechle
e0e53dee69 MIPS: Nuke trailing blank lines
Recent git versions now warn about those and they've always been a bit of
an annoyance.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:14 +01:00
Manuel Lauss
5d400f5c59 MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus
Use the GPIO config symbol to only build Au1000 interrupt code on chips with
compatible hw.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:02 +01:00
Manuel Lauss
70f82f2c59 MIPS: Alchemy: use runtime cpu detection in GPIO code.
Remove the cpu subtype cpp macros in favor of runtime detection,
to improve compile coverage of the alchemy common code.
(Increases kernel size by 700 bytes).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/699/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:02 +01:00
Florian Fainelli
66f75ccb85 MIPS: Alchemy: Add au1000-eth platform device
This patch makes the board code register the au1000-eth platform device. The
au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg
function like it has to be done for the Bosporus board which uses a
different MAC/PHY setup.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: David Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/618/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:01 +01:00
Manuel Lauss
66a1d9baf4 MIPS: Alchemy: remove unused SYS area structure
Nothing in-tree uses it, so get rid of it.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
b6e6d120c8 MIPS: Alchemy: get rid of superfluous UART definitions
Remove unused uart bit definitions and base macros.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
8402a1588a MIPS: Alchemy: prom_putchar is board dependent
This patch replaces the general alchemy prom_putchar() implementation
in favor of board-specific versions:  The UART where the output of
prom_putchar is directed to really depends on the board, the current
implementation hardcodes this on a per-SoC basis which is just wrong.

So a generic uart tx function is provided in the alchemy headers,
and the boards can provide their own prom_putchar with custom
destination uart, and all in-kernel alchemy boards support
early printk.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
963accbc82 MIPS: Alchemy: change dbdma to accept physical memory addresses
DMA can only be done from physical addresses; move the "virt_to_phys"
source/destination buffer address translation from the dbdma queueing
functions (since the hardware can only DMA to/from physical addresses)
to their respective users.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
ea071cc705 MIPS: Alchemy: remove dbdma compat macros
Remove dbdma compat macros, move remaining users over to default
queueing functions and -flags.

(Queueing function signature has changed in order to give
 a build failure instead of silent functional changes due
 to the no longer implicitly specified DDMA_FLAGS_IE flag)

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:54 +01:00
Manuel Lauss
788144656b MIPS: Alchemy: Stop IRQ name sharing
Eliminate the sharing of IRQ names among the differenct Alchemy
variants.  IRQ numbers need no longer be hidden behind a
CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy
code less reliant on a hardcoded subtype.

This patch also renames the GPIO irq number constants. It's really
an interrupt line, NOT a GPIO number!

Code which relied on certain irq numbers to have the same name
across all supported cpu subtypes is changed to determine current
cpu subtype at runtime; in some places this isn't possible so
a "compat" symbol is used.

Run-tested on DB1200.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:53 +01:00
Manuel Lauss
93e9cd8485 MIPS: Alchemy: Simple cpu subtype detector
Extract the alchemy chip variant from c0_prid register.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/14/
Patchwork: http://patchwork.linux-mips.org/patch/707/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:52 +01:00
Manuel Lauss
66213b3ccf MIPS: PCMCIA: new socket driver for Au1000 demoboards.
New PCMCIA socket driver for all Db/Pb1xxx boards (except Pb1000),
which replaces au1000_db1x00.c and (most of) au1000_pb1x00.c.
Notable improvements:
        - supports Db1000, DB/PB1100/1500/1550/1200.
        - support for carddetect and statuschange IRQs.
        - pcmcia socket mem/io/attr areas and irqs passed through
          platform resource information.
        - doesn't freeze system during card insertion/ejection like
          the one it replaces.
        - boardtype is automatically detected using BCSR ID register.

Run-tested on the DB1200.

Cc: Linux-PCMCIA <linux-pcmcia@lists.infradead.org>
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:51 +01:00
Manuel Lauss
7e50b2b741 MIPS: Alchemy: remove board_init_irq() function.
remove board_init_irq():  On all in-kernel boards it is sufficient to
initialize board interrupts in an arch_initcall by using the default
linux irq functions.

Some small irqmap.c files have been folded into board_setup files.

Run-tested on DB1200; compile-tested on all other affected boards.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:50 +01:00
Manuel Lauss
22f4bb68b3 MIPS: Alchemy: Fix dbdma ring destruction memory debugcheck.
DBDMA descriptors need to be located at 32-byte aligned addresses;
however kmalloc in conjunction with the SLAB allocator and
CONFIG_DEBUG_SLUB enabled doesn't deliver any.  The dbdma code works
around that by allocating a larger area and realigning the start
address within it.

When freeing a channel however this adjustment is not taken into
account which results in an oops:

Kernel bug detected[#1]:
[...]
Call Trace:
[<80186010>] cache_free_debugcheck+0x284/0x318
[<801869d8>] kfree+0xe8/0x2a0
[<8010b31c>] au1xxx_dbdma_chan_free+0x2c/0x7c
[<80388dc8>] au1x_pcm_dbdma_free+0x34/0x4c
[<80388fa8>] au1xpsc_pcm_close+0x28/0x38
[<80383cb8>] soc_codec_close+0x14c/0x1cc
[<8036dbb4>] snd_pcm_release_substream+0x60/0xac
[<8036dc40>] snd_pcm_release+0x40/0xa0
[<8018c7a8>] __fput+0x11c/0x228
[<80188f60>] filp_close+0x7c/0x98
[<80189018>] sys_close+0x9c/0xe4
[<801022a0>] stack_done+0x20/0x3c

Fix this by recording the address delivered by kmalloc() and using
it as parameter to kfree().

This fix is only necessary with the SLAB allocator and CONFIG_DEBUG_SLAB
enabled;  non-debug SLAB, SLUB do return nicely aligned addresses,
debug-enabled SLUB currently panics early in the boot process.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/878/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-01 20:30:25 +01:00
Florian Fainelli
e85843a1e1 MIPS: AU1000: Fix build failure for db1x00 configured for Au1100 SoC
This patch fixes the following warning, which becomes an error due to
-Werror to be turned on:
  CC      arch/mips/alchemy/common/gpiolib-au1000.o
cc1: warnings being treated as errors
arch/mips/alchemy/common/gpiolib-au1000.c: In function 'au1100_gpio2_to_irq':
/home/florian/dev/kernel/linux-queue/arch/mips/include/asm/mach-au1x00/gpio-au1000.h:107: warning: control reaches end of non-void function

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:03 +01:00
Manuel Lauss
75f4531641 MIPS: Alchemy: add gpio_request/gpio_free stubs for CONFIG_GPIOLIB=n
Some drivers use gpio_request/gpio_free regardless of whether
gpiolib is actually built;  add stubs to work around the ensuing
compile failures.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:42 +02:00
Manuel Lauss
51e02b02e6 MIPS: Alchemy: Rewrite GPIO support.
The current in-kernel Alchemy GPIO support is far too inflexible for
all my use cases.  To address this, the following changes are made:

* create generic functions which deal with manipulating the on-chip
  GPIO1/2 blocks.  Such functions are universally useful.
* Macros for GPIO2 shared interrupt management and block control.
* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.

  If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
  compatibility by directly inlining the GPIO1/2 functions.  GPIO access
  is limited to on-chip ones and they can be accessed as documented in
  the datasheets (GPIO0-31 and 200-215).

  If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
  one for GPIO2, are registered.  GPIOs can still be accessed by using
  the numberspace established in the databooks.

  However this is not yet flexible enough for my uses:  My Alchemy
  systems have a documented "external" gpio interface (fixed, different
  numberspace) and can support a variety of baseboards, some of which
  are equipped with I2C gpio expanders.  I want to be able to provide
  the default 16 GPIOs of the CPU board numbered as 0..15 and also
  support gpio expanders, if present, starting as gpio16.

  To achieve this, a new Kconfig symbol for Alchemy is introduced,
  CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
  that they don't want the Alchemy numberspace exposed to the outside
  world, but instead want to provide their own.  Boards are now respon-
  sible for providing the linux gpio interface glue code (either in a
  custom gpio.h header (in board include directory) or with gpio_chips).

  To make the board-specific inlined gpio functions work, the MIPS
  Makefile must be changed so that the mach-au1x00/gpio.h header is
  included _after_ the board headers, by moving the inclusion of
  the mach-au1x00/ to the end of the header list.

  See arch/mips/include/asm/mach-au1x00/gpio.h for more info.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:28 +01:00
Manuel Lauss
eeb09e6545 MIPS: Alchemy: Remove unused au1000_gpio.h header
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:28 +01:00
Manuel Lauss
1d9c114dc1 MIPS: au1xxx-ide: Fix build with CONFIG_PM
au1xxx_power_dev_t? is never defined;  get rid of all PM stuff as well
since it is not in the driver source anyway.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-05-14 13:50:24 +01:00
Manuel Lauss
d16797b304 MIPS: Alchemy: Add missing Au1200 GPIO203 interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-05-14 13:50:24 +01:00
Manuel Lauss
b7863ee144 MIPS: Alchemy: Fix AU1100 interrupt numbers off-by-one
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-05-14 13:50:24 +01:00
Manuel Lauss
32647e0c1f MIPS: Alchemy: provide cpu feature overrides.
Add cpu feature override constants tailored for all Alchemy variants
currently in existence.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 create mode 100644 arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
2009-03-30 14:49:46 +02:00
Florian Fainelli
47c969ee54 MIPS: Au1000: convert to using gpiolib
This patch converts the GPIO board code to use gpiolib.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-03-30 14:49:42 +02:00
Manuel Lauss
61f9c58da5 MIPS: Alchemy: new userspace suspend interface for development boards.
Replace the current sysctl-based suspend interface with a new sysfs-
based one which also uses the Linux-2.6 suspend model.

To configure wakeup sources, a subtree for the demoboards is created
under /sys/power/db1x:

sys/
`-- power
    `-- db1x
        |-- gpio0
        |-- gpio1
        |-- gpio2
        |-- gpio3
        |-- gpio4
        |-- gpio5
        |-- gpio6
        |-- gpio7
        |-- timer
        |-- timer_timeout
        |-- wakemsk
        `-- wakesrc

The nodes 'gpio[0-7]' and 'timer' configure the GPIO0..7 and M2
bits of the SYS_WAKEMSK (wakeup source enable) register.  Writing '1'
enables a wakesource, 0 disables it.

The 'timer_timeout' node holds the timeout in seconds after which the
TOYMATCH2 event should wake the system.

The 'wakesrc' node holds the SYS_WAKESRC register after wakeup (in hex),
the 'wakemsk' node can be used to get/set the wakeup mask directly.

For example, to have the timer wake the system after 10 seconds of sleep,
the following must be done in userspace:

echo 10 > /sys/power/db1x/timer_timeout
echo 1 > /sys/power/db1x/timer
echo mem > /sys/power/sleep

This patch also removes the homebrew CPU frequency switching code.  I don't
understand how it could have ever worked reliably; it does not communicate
the clock changes to peripheral devices other than uarts.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 create mode 100644 arch/mips/alchemy/devboards/pm.c
2009-01-11 09:57:27 +00:00
Manuel Lauss
ac15dad061 MIPS: Alchemy: dbdma suspend/resume support.
Implement suspend/resume for DBDMA controller and its channels.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
Manuel Lauss
564365b0fc MIPS: Alchemy: Fix up PM code on Au1550/Au1200
Au1550/Au1200 have a different memory controller which requires additi-
onal code to properly put memory to sleep (code taken from AMD/RMI's
Linux-2.6.11 source package).

Also fix up the remaining pm-related paths to compile on Au1200/Au1550
platforms.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
Manuel Lauss
2699cdfb76 MIPS: Alchemy: move calc_clock function.
Now that nothing in time.c depends on calc_clock, it can
be moved to clocks.c where it belongs.
While at it, give it a better non-generic name and call it
as soon as possible in plat_mem_init.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
Manuel Lauss
074cf65670 MIPS: Alchemy: remove cpu_table.
Remove the cpu_table:
- move detection of whether c0_config[OD] is read-only and should be set
  to fix various chip errata to au1000 headers.
- move detection of write-only sys_cpupll to au1000 headers.
- remove the BCLK switching code:  Activation of this features should be
  left to the boards using the chips since it also affects external devices
  tied to BCLK, and only the board designers know whether it is safe to
  enable.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/cputable.c
2009-01-11 09:57:26 +00:00
Manuel Lauss
1820ec1d2b MIPS: Alchemy: remove get/set_au1x00_lcd_clock().
There are no in-tree users, so remove them.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:26 +00:00
Manuel Lauss
785e3268e2 MIPS: Alchemy: update core interrupt code.
This patch attempts to modernize core Alchemy interrupt handling code.

- add irq_chips for irq controllers instead of irq type,
- add a set_type() hook to change irq trigger type during runtime,
- add a set_wake() hook to control GPIO0..7 based wakeup,
- use linux' IRQF_TRIGGER_ constants instead of homebrew ones,
- enable GENERIC_HARDIRQS_NO__DO_IRQ.
- simplify plat_irq_dispatch
- merge au1xxx_irqmap into irq.c file, the only place where its
  contents are referenced.
- board_init_irq() is now mandatory for every board; use it to register
  the remaining (gpio-based) interrupt sources; update all boards
  accordingly.

Run-tested on Db1200 and other Au1200 based platforms.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c
2009-01-11 09:57:26 +00:00
Ralf Baechle
384740dc49 MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-11 16:18:52 +01:00