Russell King ff0daca525 [ARM] Add section support to ioremap ... Allow section mappings to be setup using ioremap() and torn down with iounmap(). This requires additional support in the MM context switch to ensure that mappings are properly synchronised when mapped in. Based an original implementation by Deepak Saxena, reworked and ARMv6 support added by rmk. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2006-06-29 22:14:30 +01:00
..
abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S	[ARM] CONFIG_CPU_MPCORE -> CONFIG_CPU_32v6K	2006-02-22 21:13:28 +00:00
abort-lv4t.S
abort-macro.S
alignment.c	[ARM] 2969/1: miscellaneous whitespace cleanup	2005-10-12 19:58:10 +01:00
cache-v3.S
cache-v4.S
cache-v4wb.S	[ARM] Fix SA110/SA1100 cache flushing	2006-04-07 13:23:57 +01:00
cache-v4wt.S
cache-v6.S	[ARM] 3356/1: Workaround for the ARM1136 I-cache invalidation problem	2006-03-10 22:26:47 +00:00
consistent.c	[ARM] 3439/2: xsc3: add I/O coherency support	2006-04-02 00:07:39 +01:00
copypage-v3.S	[ARM] Remove LOADREGS macro	2006-06-25 11:23:45 +01:00
copypage-v4mc.c
copypage-v4wb.S
copypage-v4wt.S
copypage-v6.c	[ARM] Make v6 copypage function static and cleanup pgprots	2005-10-30 19:03:21 +00:00
copypage-xsc3.S	[ARM] 3377/2: add support for intel xsc3 core	2006-03-28 21:00:40 +01:00
copypage-xscale.c
discontig.c	[ARM] Cleanup ARM includes	2006-01-03 17:39:34 +00:00
extable.c
fault-armv.c	[PATCH] mm: arm ready for split ptlock	2005-10-29 21:40:42 -07:00
fault.c
fault.h
flush.c	[ARM] 3356/1: Workaround for the ARM1136 I-cache invalidation problem	2006-03-10 22:26:47 +00:00
init.c	[ARM] Remove TABLE_SIZE, and several unused function prototypes	2006-06-28 17:59:51 +01:00
iomap.c	[ARM] nommu: add stubs for ioremap and friends	2006-06-28 17:59:48 +01:00
ioremap.c	[ARM] Add section support to ioremap	2006-06-29 22:14:30 +01:00
Kconfig	[ARM] 3675/2: Preparing for AT91SAM926 support	2006-06-29 16:06:33 +01:00
Makefile	[ARM] nommu: remove fault-armv, mmap and mm-armv files from nommu build	2006-06-28 17:59:52 +01:00
mm-armv.c	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
mmap.c
mmu.c
nommu.c	[ARM] nommu: export flush_dcache_page()	2006-06-28 17:59:53 +01:00
proc-arm6_7.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm720.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm920.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm922.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm925.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm926.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm1020.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm1020e.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm1022.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-arm1026.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-macros.S
proc-sa110.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-sa1100.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-syms.c
proc-v6.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-xsc3.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
proc-xscale.S	[ARM] Set bit 4 on section mappings correctly depending on CPU	2006-06-29 18:24:21 +01:00
tlb-v3.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S	[ARM] 3352/1: DSB required for the completion of a TLB maintenance operation	2006-03-07 14:42:27 +00:00