1463fe44fd
Although permitted by the architecture, using VMIDs for stage-1 translations causes a complete nightmare for hypervisors, who end up having to virtualise the VMID space across VMs, which may be using multiple VMIDs each. To make life easier for hypervisors (which might just decide not to support this VMID virtualisation), this patch reworks the stage-1 context-bank TLB invalidation so that: - Stage-1 mappings are marked non-global in the ptes - Each Stage-1 context-bank is assigned an ASID in TTBR0 - VMID 0 is reserved for Stage-1 context-banks This allows the hypervisor to overwrite the Stage-1 VMID in the CBAR when trapping the write from the guest. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Joerg Roedel <joro@8bytes.org> |
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| .. | ||
| amd_iommu.c | ||
| amd_iommu_init.c | ||
| amd_iommu_proto.h | ||
| amd_iommu_types.h | ||
| amd_iommu_v2.c | ||
| arm-smmu.c | ||
| dmar.c | ||
| exynos-iommu.c | ||
| intel-iommu.c | ||
| intel_irq_remapping.c | ||
| iommu.c | ||
| iova.c | ||
| irq_remapping.c | ||
| irq_remapping.h | ||
| Kconfig | ||
| Makefile | ||
| msm_iommu.c | ||
| msm_iommu_dev.c | ||
| of_iommu.c | ||
| omap-iommu-debug.c | ||
| omap-iommu.c | ||
| omap-iommu.h | ||
| omap-iommu2.c | ||
| omap-iopgtable.h | ||
| omap-iovmm.c | ||
| pci.h | ||
| shmobile-iommu.c | ||
| shmobile-ipmmu.c | ||
| shmobile-ipmmu.h | ||
| tegra-gart.c | ||
| tegra-smmu.c | ||