Ben Skeggs 1ae73f2f16 drm/nvc0/pm: restrict pll mode to clocks that can actually use it ... Fixes reclocking failure on some chips where we attempted to set PDAEMON to PLL mode. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>		2012-03-13 17:14:58 +10:00
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drm	drm/nvc0/pm: restrict pll mode to clocks that can actually use it	2012-03-13 17:14:58 +10:00
stub
vga	drivers/gpu/vga/vgaarb.c: add missing kfree	2011-11-22 20:21:10 +00:00
Makefile