1a22ec09a2
Now that the driver core allows for struct class to be in read-only memory, move the fpga_region_class structure to be declared at build time placing it into read-only memory, instead of having to be dynamically allocated at boot time. Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com> Acked-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20230811073043.52808-3-ivan.orlov0322@gmail.com Signed-off-by: Xu Yilun <yilun.xu@intel.com> |
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.. | ||
tests | ||
altera-cvp.c | ||
altera-fpga2sdram.c | ||
altera-freeze-bridge.c | ||
altera-hps2fpga.c | ||
altera-pr-ip-core-plat.c | ||
altera-pr-ip-core.c | ||
altera-ps-spi.c | ||
dfl-afu-dma-region.c | ||
dfl-afu-error.c | ||
dfl-afu-main.c | ||
dfl-afu-region.c | ||
dfl-afu.h | ||
dfl-fme-br.c | ||
dfl-fme-error.c | ||
dfl-fme-main.c | ||
dfl-fme-mgr.c | ||
dfl-fme-perf.c | ||
dfl-fme-pr.c | ||
dfl-fme-pr.h | ||
dfl-fme-region.c | ||
dfl-fme.h | ||
dfl-n3000-nios.c | ||
dfl-pci.c | ||
dfl.c | ||
dfl.h | ||
fpga-bridge.c | ||
fpga-mgr.c | ||
fpga-region.c | ||
ice40-spi.c | ||
intel-m10-bmc-sec-update.c | ||
Kconfig | ||
lattice-sysconfig-spi.c | ||
lattice-sysconfig.c | ||
lattice-sysconfig.h | ||
machxo2-spi.c | ||
Makefile | ||
microchip-spi.c | ||
of-fpga-region.c | ||
socfpga-a10.c | ||
socfpga.c | ||
stratix10-soc.c | ||
ts73xx-fpga.c | ||
versal-fpga.c | ||
xilinx-pr-decoupler.c | ||
xilinx-spi.c | ||
zynq-fpga.c | ||
zynqmp-fpga.c |