4a3de5aa77
i.MX93 CCM ROOT STAT register has a SLICE_BUSY bit: indication for clock generation logic is applying new setting. 0b - Clock generation logic is not busy. 1b - Clock generation logic is applying new setting. So when set parent/rate/gate, need check this bit. Introduce specific ops to do the work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-4-peng.fan@oss.nxp.com |
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.. | ||
clk-busy.c | ||
clk-composite-7ulp.c | ||
clk-composite-8m.c | ||
clk-composite-93.c | ||
clk-cpu.c | ||
clk-divider-gate.c | ||
clk-fixup-div.c | ||
clk-fixup-mux.c | ||
clk-frac-pll.c | ||
clk-fracn-gppll.c | ||
clk-gate-exclusive.c | ||
clk-gate2.c | ||
clk-imx1.c | ||
clk-imx5.c | ||
clk-imx6q.c | ||
clk-imx6sl.c | ||
clk-imx6sll.c | ||
clk-imx6sx.c | ||
clk-imx6ul.c | ||
clk-imx7d.c | ||
clk-imx7ulp.c | ||
clk-imx8dxl-rsrc.c | ||
clk-imx8mm.c | ||
clk-imx8mn.c | ||
clk-imx8mp.c | ||
clk-imx8mq.c | ||
clk-imx8qm-rsrc.c | ||
clk-imx8qxp-lpcg.c | ||
clk-imx8qxp-lpcg.h | ||
clk-imx8qxp-rsrc.c | ||
clk-imx8qxp.c | ||
clk-imx8ulp.c | ||
clk-imx25.c | ||
clk-imx27.c | ||
clk-imx31.c | ||
clk-imx35.c | ||
clk-imx93.c | ||
clk-imxrt1050.c | ||
clk-lpcg-scu.c | ||
clk-pfd.c | ||
clk-pfdv2.c | ||
clk-pll14xx.c | ||
clk-pllv1.c | ||
clk-pllv2.c | ||
clk-pllv3.c | ||
clk-pllv4.c | ||
clk-scu.c | ||
clk-scu.h | ||
clk-sscg-pll.c | ||
clk-vf610.c | ||
clk.c | ||
clk.h | ||
Kconfig | ||
Makefile |