f805e35631
Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and add support for ma35d1 pinctrl. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Link: https://lore.kernel.org/r/20240521012447.42211-4-ychuang570808@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2024 Nuvoton Technology Corp.
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*
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* Author: Shan-Chun Hung <schung@nuvoton.com>
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* * Jacky Huang <ychuang3@nuvoton.com>
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*/
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#ifndef __PINCTRL_MA35_H
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#define __PINCTRL_MA35_H
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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struct ma35_mux_desc {
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const char *name;
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u32 muxval;
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};
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struct ma35_pin_data {
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u32 offset;
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u32 shift;
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struct ma35_mux_desc *muxes;
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};
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struct ma35_pinctrl_soc_info {
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const struct pinctrl_pin_desc *pins;
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unsigned int npins;
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int (*get_pin_num)(int offset, int shift);
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};
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#define MA35_PIN(num, n, o, s, ...) { \
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.number = num, \
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.name = #n, \
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.drv_data = &(struct ma35_pin_data) { \
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.offset = o, \
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.shift = s, \
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.muxes = (struct ma35_mux_desc[]) { \
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__VA_ARGS__, { } }, \
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}, \
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}
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#define MA35_MUX(_val, _name) { \
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.name = _name, \
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.muxval = _val, \
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}
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int ma35_pinctrl_probe(struct platform_device *pdev, const struct ma35_pinctrl_soc_info *info);
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int ma35_pinctrl_suspend(struct device *dev);
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int ma35_pinctrl_resume(struct device *dev);
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#endif /* __PINCTRL_MA35_H */
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