kernel-hacking-2024-linux-s.../drivers/gpu
Roy Spliet c7c039fd31 drm/nouveau/pm: implement DDR2/DDR3/GDDR3/GDDR5 MR generation and validation
Roy Spliet:
- Implement according to specs
- Simplify
- Make array for mc latency registers

Martin Peres:
- squash and split all the commits from Roy
- rework following Ben Skeggs comments
- add a form of timings validation
- store the initial timings for later use

Ben Skeggs
- merge slightly modified tidy-up patch with this one
- remove perflvl-dropping logic for the moment

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:07:50 +10:00
..
drm drm/nouveau/pm: implement DDR2/DDR3/GDDR3/GDDR5 MR generation and validation 2012-03-13 17:07:50 +10:00
stub
vga
Makefile