Haojian Zhuang b8802f76fe irqchip: gic: Use mask field in GICC_IAR ... Bit[9:0] is interrupt ID field in GICC_IAR. Bit[12:10] is CPU ID field, and others are reserved. So we should use GICC_IAR_INT_ID_MASK to get interrupt ID. It's not a good way to use ~0x1c00 (CPU ID field) to get interrupt ID. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Link: https://lkml.kernel.org/r/1399795571-17231-3-git-send-email-haojian.zhuang@linaro.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>		2014-05-19 00:35:23 +00:00
..
arm-gic.h	irqchip: gic: Use mask field in GICC_IAR	2014-05-19 00:35:23 +00:00
arm-vic.h	irqchip: support cascaded VICs	2014-02-13 11:21:21 +01:00
chained_irq.h
irq-crossbar.h	DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP	2014-02-05 20:08:34 +05:30
metag-ext.h
metag.h
mmp.h
mxs.h
spear-shirq.h
versatile-fpga.h
xtensa-mx.h
xtensa-pic.h