68f5d3f3b6
To support testing of PCI/PCIe drivers in UML, add a PCI bus support driver. This driver uses virtio, which in UML is really just vhost-user, to talk to devices, and adds the devices to the virtual PCI bus in the system. Since virtio already allows DMA/bus mastering this really isn't all that hard, of course we need the logic_iomem infrastructure that was added by a previous patch. The protocol to talk to the device is has a few fairly simple messages for reading to/writing from config and IO spaces, and messages for the device to send the various interrupts (INT#, MSI/MSI-X and while suspended PME#). Note that currently no offical virtio device ID is assigned for this protocol, as a consequence this patch requires defining it in the Kconfig, with a default that makes the driver refuse to work at all. Finally, in order to add support for MSI/MSI-X interrupts, some small changes are needed in the UML IRQ code, it needs to have more interrupts, changing NR_IRQS from 64 to 128 if this driver is enabled, but not actually use them for anything so that the generic IRQ domain/MSI infrastructure can allocate IRQ numbers. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Richard Weinberger <richard@nod.at>
13 lines
312 B
C
13 lines
312 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021 Intel Corporation
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* Author: Johannes Berg <johannes@sipsolutions.net>
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*/
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#include <asm/iomap.h>
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#include <asm-generic/pci_iomap.h>
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void __iomem *__pci_ioport_map(struct pci_dev *dev, unsigned long port,
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unsigned int nr)
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{
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return NULL;
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}
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